Enable fpu instructions in nasm tests
This commit is contained in:
Fabian
parent
bb0e58ace9
commit
05296b0586
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@ -273,6 +273,78 @@ const encodings = [
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// XXX: Temporary block boundary
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{ opcode: 0xD7, skip: 1, block_boundary: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1 }, // fldenv (only memory). TODO: Make reg variant non-block-boundary
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{ opcode: 0xD9, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, skip: 1, }, // fstenv (mem), fprem (reg)
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{ opcode: 0xD9, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, only_mem: 1, }, // fprem
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{ opcode: 0xDA, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1, }, // unimplemented: fisttp (sse3)
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{ opcode: 0xDB, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDD, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDD, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1, }, // XXX: Test should fail
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{ opcode: 0xDD, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDD, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDD, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1, }, // frstor
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{ opcode: 0xDD, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDD, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1, }, // fsave
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{ opcode: 0xDD, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDF, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1 },
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{ opcode: 0xDF, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1 }, // unimplemented: fisttp (sse3)
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{ opcode: 0xDF, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1 },
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{ opcode: 0xDF, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1 },
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{ opcode: 0xDF, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1 }, // mem exists, but not implemented
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{ opcode: 0xDF, e: 1, fixed_g: 5, custom: 0, is_fpu: 1, task_switch_test: 1, },
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{ opcode: 0xDF, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, only_reg: 1 }, // mem exists, but not implemented
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{ opcode: 0xDF, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
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// loop, jcxz, etc.
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// Conditional jumps, but condition code not supported by code generator
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// (these are never generated by modern compilers)
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@ -722,7 +794,7 @@ const encodings = [
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{ sse: 1, opcode: 0x660F75, e: 1, },
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{ sse: 1, opcode: 0x0F76, e: 1, },
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{ sse: 1, opcode: 0x660F76, e: 1, },
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{ sse: 1, opcode: 0x0F77 },
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{ sse: 1, opcode: 0x0F77, skip: 1 }, // emms (skip as it breaks gdb printing of float registers)
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// vmx instructions
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{ opcode: 0x0F78, skip: 1, block_boundary: 1, },
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@ -892,15 +964,6 @@ for(let i = 0; i < 8; i++)
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{ opcode: 0xD1, os: 1, e: 1, fixed_g: i, mask_flags: af, custom: 1, },
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{ opcode: 0xD2, e: 1, fixed_g: i, mask_flags: of | af, },
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{ opcode: 0xD3, os: 1, e: 1, fixed_g: i, mask_flags: of | af, custom: 1, },
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{ opcode: 0xD8, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xD9, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xDA, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xDB, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xDC, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xDD, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xDE, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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{ opcode: 0xDF, e: 1, fixed_g: i, skip: 1, task_switch_test: 1, },
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]);
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}
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@ -290,6 +290,9 @@ CPU.prototype.wasm_patch = function(wm)
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this.set_stack_reg = get_import("set_stack_reg");
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this.fpu_load_tag_word = get_import("fpu_load_tag_word");
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this.fpu_load_status_word = get_import("fpu_load_status_word");
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this.translate_address_read = get_import("translate_address_read_js");
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this.translate_address_system_read = get_import("translate_address_system_read_js");
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this.translate_address_system_write = get_import("translate_address_system_write_js");
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@ -188,7 +188,7 @@ function create_nasm(op, config)
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codes.push("mov " + reg + ", " + rand);
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}
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if(true) // generate random mmx registers
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if(!op.is_fpu) // generate random mmx registers
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{
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codes.push("sub esp, 8");
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for(let i = 0; i < 8; i++)
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@ -199,6 +199,25 @@ function create_nasm(op, config)
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}
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codes.push("add esp, 8");
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}
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else // generate random fpu registers
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{
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codes.push("finit");
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codes.push("sub esp, 8");
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for(let i = 0; i < 8; i++)
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{
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codes.push("mov dword [esp], " + op_rand.next());
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codes.push("mov dword [esp + 4], " + op_rand.next());
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codes.push("fld qword [esp]");
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}
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for(let i = 0; i < 4; i++) // half full stack
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{
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codes.push("fstp qword [esp]");
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}
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codes.push("add esp, 8");
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}
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if(true) // generate random xmm registers
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{
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@ -294,24 +313,21 @@ function create_nasm(op, config)
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g = op.fixed_g;
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}
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let e;
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let sib;
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if(config.mem)
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{
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e = 0x04; // [esp]
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sib = 0x24;
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const e = 0x04; // [esp]
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const sib = 0x24;
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codes.push("db " + (e | g << 3));
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codes.push("db " + sib);
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}
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else // op.only_mem
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{
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e = 0xc2; // edx
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sib = "<invalid>";
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}
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codes.push("db " + (e | g << 3));
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if(e < 0xC0)
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{
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codes.push("db " + sib);
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const es = op.is_fpu ? [0, 1, 2, 3, 4, 5, 6, 7] : [
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2 // edx
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];
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const modrm_bytes = es.map(e => "db " + (0xC0 | g << 3 | e));
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codes.push(modrm_bytes);
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}
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}
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}
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@ -25,6 +25,52 @@ define extract-state
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printf " %d,\n", $ebp
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printf " %d,\n", $esi
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printf " %d,\n", $edi
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printf " \n"
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# For fpu registers, check the tag register first. If the tag index is
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# invalid and you try to access to corresponding register, gdb exits with an
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# error.
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if ($ftag & (3 << 0)) != (2 << 0)
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printf " %.100e,\n", $st0
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 2)) != (2 << 2)
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printf " %.100e,\n", $st1
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 4)) != (2 << 4)
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printf " %.100e,\n", $st2
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 6)) != (2 << 6)
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printf " %.100e,\n", $st3
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 8)) != (2 << 8)
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printf " %.100e,\n", $st4
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 10)) != (2 << 10)
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printf " %.100e,\n", $st5
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 12)) != (2 << 12)
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printf " %.100e,\n", $st6
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else
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printf " \"invalid\","
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end
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if ($ftag & (3 << 14)) != (2 << 14)
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printf " %.100e,\n", $st7
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else
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printf " \"invalid\","
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end
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printf " \n"
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printf " %d,\n", $mm0.v2_int32[0]
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@ -97,7 +143,9 @@ define extract-state
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printf " %d,\n", *(int*)($STACK_TOP-4)
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printf " \n"
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printf " %d\n", $eflags
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printf " %d,\n", $eflags
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printf " %d,\n", $ftag
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printf " %d\n", $fstat
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printf "]\n"
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printf "---END JSON---\n"
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@ -31,7 +31,16 @@ const TERMINATE_MSG = "DONE";
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const FORCE_JIT = process.argv.includes("--force-jit");
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// alternative representation for infinity for json
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const JSON_POS_INFINITY = "+INFINITY";
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const JSON_NEG_INFINITY = "-INFINITY";
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const JSON_POS_NAN = "+NAN";
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const JSON_NEG_NAN = "-NAN";
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const MASK_ARITH = 1 | 1 << 2 | 1 << 4 | 1 << 6 | 1 << 7 | 1 << 11;
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const FPU_TAG_ALL_INVALID = 0xAAAA;
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const FPU_STATUS_MASK = 0xFFFF & ~(1 << 9 | 1 << 5 | 1 << 3); // bits that are not correctly implemented by v86
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const FP_COMPARISON_SIGNIFICANT_DIGITS = 7;
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try {
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var V86 = require(`../../build/${TEST_RELEASE_BUILD ? "libv86" : "libv86-debug"}.js`).V86;
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@ -43,6 +52,39 @@ catch(e) {
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process.exit(1);
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}
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function float_equal(x, y)
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{
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console.assert(typeof x === "number");
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console.assert(typeof y === "number");
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if(x === Infinity && y === Infinity || x === -Infinity && y === -Infinity || isNaN(x) && isNaN(y))
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{
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return true;
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}
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const epsilon = Math.pow(10, -FP_COMPARISON_SIGNIFICANT_DIGITS);
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return Math.abs(x - y) < epsilon;
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}
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function format_value(v)
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{
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if(typeof v === "number")
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{
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if((v >>> 0) !== v)
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{
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return String(v);
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}
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else
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{
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return "0x" + (v >>> 0).toString(16);
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}
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}
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else
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{
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return String(v);
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}
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}
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if(cluster.isMaster)
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{
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function extract_json(name, fixture_text)
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@ -67,7 +109,13 @@ if(cluster.isMaster)
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throw new Error("Test was killed during execution by gdb: " + name + "\n" + fixture_text);
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}
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const json_regex = /---BEGIN JSON---([\s\[\]\w":\-,]*)---END JSON---/;
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fixture_text = fixture_text.toString()
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.replace(/-inf\b/g, JSON.stringify(JSON_NEG_INFINITY))
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.replace(/\binf\b/g, JSON.stringify(JSON_POS_INFINITY))
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.replace(/-nan\b/g, JSON.stringify(JSON_NEG_NAN))
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.replace(/\bnan\b/g, JSON.stringify(JSON_POS_NAN));
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const json_regex = /---BEGIN JSON---([\s\[\]\.\+\w":\-,]*)---END JSON---/;
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const regex_match = json_regex.exec(fixture_text);
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if (!regex_match || regex_match.length < 2) {
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throw new Error("Could not find JSON in fixture text: " + fixture_text + "\nTest: " + name);
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@ -180,15 +228,9 @@ if(cluster.isMaster)
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console.error("\n[-] %s:", test_failure.img_name);
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test_failure.failures.forEach(function(failure) {
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function format_value(v) {
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if(typeof v === "number")
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return "0x" + (v >>> 0).toString(16);
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else
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return String(v);
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}
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console.error("\n\t" + failure.name);
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console.error("\tActual: " + format_value(failure.actual));
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console.error("\tExpected: " + format_value(failure.expected));
|
||||
console.error("\tActual: " + failure.actual);
|
||||
console.error("\tExpected: " + failure.expected);
|
||||
});
|
||||
});
|
||||
process.exit(1);
|
||||
|
|
@ -300,23 +342,36 @@ else {
|
|||
emulator.stop();
|
||||
var cpu = emulator.v86.cpu;
|
||||
|
||||
const filename = TEST_DIR + current_test.img_name;
|
||||
const evaluated_fpu_regs = new Float64Array(8).map((_, i) => cpu.fpu_st[i + cpu.fpu_stack_ptr[0] & 7]);
|
||||
const evaluated_mmxs = cpu.reg_mmxs;
|
||||
const evaluated_xmms = cpu.reg_xmm32s;
|
||||
const esp = cpu.reg32s[4];
|
||||
const evaluated_memory = new Int32Array(cpu.mem8.slice(0x120000 - 16 * 4, 0x120000).buffer);
|
||||
const evaluated_fpu_tag = cpu.fpu_load_tag_word();
|
||||
const evaluated_fpu_status = cpu.fpu_load_status_word() & FPU_STATUS_MASK;
|
||||
|
||||
let individual_failures = [];
|
||||
|
||||
console.assert(current_test.fixture.array || current_test.fixture.exception);
|
||||
|
||||
const FLOAT_TRANSLATION = {
|
||||
[JSON_POS_INFINITY]: Infinity,
|
||||
[JSON_NEG_INFINITY]: -Infinity,
|
||||
[JSON_POS_NAN]: NaN,
|
||||
[JSON_NEG_NAN]: NaN, // XXX: Ignore sign of NaN
|
||||
};
|
||||
|
||||
if(current_test.fixture.array)
|
||||
{
|
||||
let offset = 0;
|
||||
const expected_reg32s = current_test.fixture.array.slice(offset, offset += 8);
|
||||
const expected_fpu_regs =
|
||||
current_test.fixture.array.slice(offset, offset += 8) .map(x => x in FLOAT_TRANSLATION ? FLOAT_TRANSLATION[x] : x);
|
||||
const expected_mmx_registers = current_test.fixture.array.slice(offset, offset += 16);
|
||||
const expected_xmm_registers = current_test.fixture.array.slice(offset, offset += 32);
|
||||
const expected_memory = current_test.fixture.array.slice(offset, offset += 16);
|
||||
const expected_eflags = current_test.fixture.array[offset] & MASK_ARITH;
|
||||
const expected_eflags = current_test.fixture.array[offset++] & MASK_ARITH;
|
||||
const fpu_tag = current_test.fixture.array[offset++];
|
||||
const fpu_status = current_test.fixture.array[offset++] & FPU_STATUS_MASK;
|
||||
|
||||
for (let i = 0; i < cpu.reg32s.length; i++) {
|
||||
let reg = cpu.reg32s[i];
|
||||
|
|
@ -329,15 +384,40 @@ else {
|
|||
}
|
||||
}
|
||||
|
||||
for (let i = 0; i < evaluated_mmxs.length; i++) {
|
||||
if (evaluated_mmxs[i] !== expected_mmx_registers[i]) {
|
||||
if(fpu_tag !== FPU_TAG_ALL_INVALID)
|
||||
{
|
||||
for (let i = 0; i < evaluated_fpu_regs.length; i++) {
|
||||
if (expected_fpu_regs[i] !== "invalid" &&
|
||||
!float_equal(evaluated_fpu_regs[i], expected_fpu_regs[i])) {
|
||||
individual_failures.push({
|
||||
name: "st" + i,
|
||||
expected: expected_fpu_regs[i],
|
||||
actual: evaluated_fpu_regs[i],
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
if(fpu_status !== evaluated_fpu_status)
|
||||
{
|
||||
individual_failures.push({
|
||||
name: "mm" + (i >> 1) + ".int32[" + (i & 1) + "] (cpu.reg_mmx[" + i + "])",
|
||||
expected: expected_mmx_registers[i],
|
||||
actual: evaluated_mmxs[i],
|
||||
name: "fpu status word",
|
||||
expected: fpu_status,
|
||||
actual: evaluated_fpu_status,
|
||||
});
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for (let i = 0; i < evaluated_mmxs.length; i++) {
|
||||
if (evaluated_mmxs[i] !== expected_mmx_registers[i]) {
|
||||
individual_failures.push({
|
||||
name: "mm" + (i >> 1) + ".int32[" + (i & 1) + "] (cpu.reg_mmx[" + i + "])",
|
||||
expected: expected_mmx_registers[i],
|
||||
actual: evaluated_mmxs[i],
|
||||
});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (let i = 0; i < evaluated_xmms.length; i++) {
|
||||
if (evaluated_xmms[i] !== expected_xmm_registers[i]) {
|
||||
|
|
@ -379,6 +459,14 @@ else {
|
|||
});
|
||||
}
|
||||
|
||||
individual_failures = individual_failures.map(({ name, actual, expected }) => {
|
||||
return {
|
||||
name,
|
||||
actual: format_value(actual),
|
||||
expected: format_value(expected),
|
||||
};
|
||||
});
|
||||
|
||||
recorded_exceptions = [];
|
||||
|
||||
if (individual_failures.length > 0) {
|
||||
|
|
|
|||
Loading…
Reference in a new issue