PCI: irq routing and byte/word write access
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147cd0411c
11
src/ne2k.js
11
src/ne2k.js
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@ -62,6 +62,9 @@ function Ne2k(cpu, bus)
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/** @const @type {CPU} */
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this.cpu = cpu;
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/** @const @type {PCI} */
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this.pci = cpu.devices.pci;
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/** @const @type {BusConnector} */
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this.bus = bus;
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this.bus.register("net0-receive", function(data)
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@ -82,7 +85,7 @@ function Ne2k(cpu, bus)
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0xec, 0x10, 0x29, 0x80, 0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
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this.port & 0xFF | 1, this.port >> 8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf4, 0x1a, 0x00, 0x11,
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0x00, 0x00, 0xb8, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x01, 0x00, 0x00,
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0x00, 0x00, 0xb8, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
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];
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this.pci_id = 0x05 << 3;
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this.pci_bars = [
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@ -99,8 +102,6 @@ function Ne2k(cpu, bus)
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this.dcfg = 0;
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this.irq = 0x0B;
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this.rcnt = 0;
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this.tcnt = 0;
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@ -547,11 +548,11 @@ Ne2k.prototype.update_irq = function()
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{
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if(this.imr & this.isr)
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{
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this.cpu.device_raise_irq(this.irq);
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this.pci.raise_irq(this.pci_id);
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}
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else
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{
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this.cpu.device_lower_irq(this.irq);
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this.pci.lower_irq(this.pci_id);
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}
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};
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168
src/pci.js
168
src/pci.js
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@ -25,6 +25,9 @@ function PCI(cpu)
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this.device_spaces = [];
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this.devices = [];
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/** @const @type {CPU} */
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this.cpu = cpu;
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for(var i = 0; i < 256; i++)
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{
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this.device_spaces[i] = undefined;
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@ -33,41 +36,41 @@ function PCI(cpu)
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this.io = cpu.io;
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/*
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cpu.io.register_write(0xCF9, function(value)
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{
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dbg_log("PCI reboot: " + h(value, 2), LOG_PCI);
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cpu.io.register_write(PCI_CONFIG_DATA, this,
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function(value)
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{
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this.pci_write8(this.pci_addr32[0], value);
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},
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function(value)
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{
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this.pci_write16(this.pci_addr32[0], value);
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},
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function(value)
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{
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this.pci_write32(this.pci_addr32[0], value);
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});
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// PCI reboot
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if(value & 6)
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cpu.io.register_write(PCI_CONFIG_DATA + 1, this,
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function(value)
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{
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cpu_restart();
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}
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});*/
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this.pci_write8(this.pci_addr32[0] + 1 | 0, value);
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});
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cpu.io.register_write_consecutive(PCI_CONFIG_DATA, this,
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function(out_byte)
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cpu.io.register_write(PCI_CONFIG_DATA + 2, this,
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function(value)
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{
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dbg_log("PCI data0: " + h(out_byte, 2) + " addr=" + h(this.pci_addr32[0] >>> 0), LOG_PCI);
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this.pci_value[0] = out_byte;
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this.pci_write8(this.pci_addr32[0] + 2 | 0, value);
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},
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function(out_byte)
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function(value)
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{
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dbg_log("PCI data1: " + h(out_byte, 2) + " addr=" + h(this.pci_addr32[0] >>> 0), LOG_PCI);
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this.pci_value[1] = out_byte;
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},
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function(out_byte)
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this.pci_write16(this.pci_addr32[0] + 2 | 0, value);
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});
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cpu.io.register_write(PCI_CONFIG_DATA + 3, this,
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function(value)
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{
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dbg_log("PCI data2: " + h(out_byte, 2) + " addr=" + h(this.pci_addr32[0] >>> 0), LOG_PCI);
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this.pci_value[2] = out_byte;
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},
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function(out_byte)
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{
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dbg_log("PCI data3: " + h(out_byte, 2) + " addr=" + h(this.pci_addr32[0] >>> 0), LOG_PCI);
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this.pci_value[3] = out_byte;
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this.pci_write();
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}
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);
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this.pci_write8(this.pci_addr32[0] + 3 | 0, value);
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});
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cpu.io.register_read_consecutive(PCI_CONFIG_DATA, this,
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function()
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@ -110,7 +113,7 @@ function PCI(cpu)
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cpu.io.register_write_consecutive(PCI_CONFIG_ADDRESS, this,
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function(out_byte)
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{
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this.pci_addr[0] = out_byte;
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this.pci_addr[0] = out_byte & 0xFC;
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},
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function(out_byte)
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{
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@ -156,7 +159,7 @@ function PCI(cpu)
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};
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this.register_device(host_bridge);
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var isa_bridge = {
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this.isa_bridge = {
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pci_id: 1 << 3,
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pci_space: [
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// 00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]
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@ -168,7 +171,8 @@ function PCI(cpu)
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pci_bars: [],
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name: "82371SB PIIX3 ISA",
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};
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this.register_device(isa_bridge);
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this.isa_bridge_space = this.register_device(this.isa_bridge);
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this.isa_bridge_space8 = new Uint8Array(this.isa_bridge_space.buffer);
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// 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90)
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//this.register_device([
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@ -298,28 +302,74 @@ PCI.prototype.pci_query = function()
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}
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};
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PCI.prototype.pci_write = function()
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PCI.prototype.pci_write8 = function(address, written)
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{
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var bdf = this.pci_addr[2] << 8 | this.pci_addr[1],
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addr = this.pci_addr[0] & 0xFC;
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var bdf = address >> 8 & 0xFFFF;
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var addr = address & 0xFF;
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var space = this.device_spaces[bdf],
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device = this.devices[bdf];
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var space = new Uint8Array(this.device_spaces[bdf].buffer);
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var device = this.devices[bdf];
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if(!space)
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{
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return;
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}
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var written = this.pci_value32[0];
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dbg_assert(!(addr >= 0x10 && addr < 0x2C || addr >= 0x30 && addr < 0x34),
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"PCI: Expected 32-bit write");
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dbg_log("PCI write8 dev=" + h(bdf >> 3, 2) + " (" + device.name + ") addr=" + h(addr, 4) +
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" value=" + h(written, 2), LOG_PCI);
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space[addr] = written;
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};
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PCI.prototype.pci_write16 = function(address, written)
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{
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dbg_assert((address & 1) === 0);
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var bdf = address >> 8 & 0xFFFF;
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var addr = address & 0xFF;
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var space = new Uint16Array(this.device_spaces[bdf].buffer);
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var device = this.devices[bdf];
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if(!space)
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{
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return;
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}
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dbg_assert(!(addr >= 0x10 && addr < 0x2C || addr >= 0x30 && addr < 0x34),
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"PCI: Expected 32-bit write");
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dbg_log("PCI writ16 dev=" + h(bdf >> 3, 2) + " (" + device.name + ") addr=" + h(addr, 4) +
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" value=" + h(written, 4), LOG_PCI);
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space[addr >>> 1] = written;
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};
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PCI.prototype.pci_write32 = function(address, written)
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{
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dbg_assert((address & 3) === 0);
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var bdf = address >> 8 & 0xFFFF;
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var addr = address & 0xFF;
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var space = this.device_spaces[bdf];
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var device = this.devices[bdf];
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if(!space)
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{
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return;
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}
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if(addr >= 0x10 && addr < 0x28)
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{
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var bar_nr = addr - 0x10 >> 2;
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var bar = device.pci_bars[bar_nr];
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//dbg_log("BAR" + bar_nr + " changed to " + h(space[addr >> 2] >>> 0) + " dev=" + h(bdf >> 3, 2), LOG_PCI);
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dbg_log("BAR" + bar_nr + " exists=" + (bar ? "y" : "n") + " changed to " + h(written >>> 0) + " dev=" + h(bdf >> 3, 2) + " (" + device.name + ") ", LOG_PCI);
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dbg_log("BAR" + bar_nr + " exists=" + (bar ? "y" : "n") + " changed to " +
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h(written >>> 0) + " dev=" + h(bdf >> 3, 2) + " (" + device.name + ") ", LOG_PCI);
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if(bar)
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{
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@ -396,11 +446,6 @@ PCI.prototype.pci_write = function()
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space[addr >> 2] = 0;
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}
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}
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else if(addr === 0x04)
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{
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dbg_log("PCI write dev=" + h(bdf >> 3, 2) + " (" + device.name + ") addr=" + h(addr, 4) +
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" value=" + h(written >>> 0, 8), LOG_PCI);
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}
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else
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{
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dbg_log("PCI write dev=" + h(bdf >> 3, 2) + " (" + device.name + ") addr=" + h(addr, 4) +
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@ -424,7 +469,8 @@ PCI.prototype.register_device = function(device)
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dbg_assert(device_id < this.devices.length);
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// convert bytewise notation from lspci to double words
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var space = new Int32Array(new Uint8Array(device.pci_space).buffer);
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var space = new Int32Array(64);
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space.set(new Int32Array(new Uint8Array(device.pci_space).buffer));
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this.device_spaces[device_id] = space;
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this.devices[device_id] = device;
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@ -460,6 +506,8 @@ PCI.prototype.register_device = function(device)
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}
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}
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}
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return space;
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};
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PCI.prototype.set_io_bars = function(bar, from, to)
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@ -499,3 +547,33 @@ PCI.prototype.set_io_bars = function(bar, from, to)
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dbg_assert(empty_entry.write32 === this.io.empty_port_write, "Bad IO bar: Target already mapped");
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}
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};
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PCI.prototype.raise_irq = function(pci_id)
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{
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var space = this.device_spaces[pci_id];
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dbg_assert(space);
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var pin = (space[0x3C >>> 2] >> 8 & 0xFF) - 1;
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var device = (pci_id >> 3) - 1 & 0xFF;
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var parent_pin = pin + device & 3;
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var irq = this.isa_bridge_space8[0x60 + parent_pin];
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//dbg_log("PCI raise irq " + h(irq) + " dev=" + h(device, 2) +
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// " (" + this.devices[pci_id].name + ")", LOG_PCI);
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this.cpu.device_raise_irq(irq);
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};
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PCI.prototype.lower_irq = function(pci_id)
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{
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var space = this.device_spaces[pci_id];
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dbg_assert(space);
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var pin = space[0x3C >>> 2] >> 8 & 0xFF;
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var device = pci_id >> 3 & 0xFF;
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var parent_pin = pin + device - 2 & 3;
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var irq = this.isa_bridge_space8[0x60 + parent_pin];
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//dbg_log("PCI lower irq " + h(irq) + " dev=" + h(device, 2) +
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// " (" + this.devices[pci_id].name + ")", LOG_PCI);
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this.cpu.device_lower_irq(irq);
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};
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@ -11,13 +11,11 @@ function VirtIO(cpu, bus, filesystem)
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{
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// http://ozlabs.org/~rusty/virtio-spec/virtio-0.9.5.pdf
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this.irq = 10;
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this.pci_space = [
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0xf4, 0x1a, 0x09, 0x10, 0x07, 0x05, 0x10, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x01, 0xa8, 0x00, 0x00, 0x00, 0x10, 0xbf, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf4, 0x1a, 0x09, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, this.irq, 0x01, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
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];
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this.pci_id = 0x06 << 3;
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this.pci_bars = [
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@ -123,7 +121,7 @@ function VirtIO(cpu, bus, filesystem)
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// reading resets the isr
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var isr = this.isr;
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this.isr = 0;
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this.cpu.device_lower_irq(this.irq);
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this.pci.lower_irq(this.pci_id);
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return isr;
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});
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@ -160,6 +158,9 @@ function VirtIO(cpu, bus, filesystem)
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/** @const @type {CPU} */
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this.cpu = cpu;
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/** @const @type {PCI} */
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this.pci = cpu.devices.pci;
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/** @const @type {BusConnector} */
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this.bus = bus;
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@ -205,7 +206,7 @@ VirtIO.prototype.get_state = function()
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{
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var state = [];
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state[0] = this.irq;
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state[0] = 0; // unused
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state[1] = this.queue_select;
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state[2] = this.device_status;
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state[3] = this.isr;
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@ -219,7 +220,6 @@ VirtIO.prototype.get_state = function()
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VirtIO.prototype.set_state = function(state)
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{
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this.irq = state[0];
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this.queue_select = state[1];
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this.device_status = state[2];
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this.isr = state[3];
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@ -414,7 +414,5 @@ VirtIO.prototype.device_reply = function(queueidx, infos)
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this.cpu.write32(used_desc_offset + 4, result_length);
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this.isr |= 1;
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this.cpu.device_raise_irq(this.irq);
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this.pci.raise_irq(this.pci_id);
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};
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