diff --git a/gen/x86_table.js b/gen/x86_table.js
index d9745136..6c735d18 100644
--- a/gen/x86_table.js
+++ b/gen/x86_table.js
@@ -649,8 +649,8 @@ const encodings = [
     { sse: 1, opcode: 0x660F29, e: 1, custom: 1 },
     { sse: 1, opcode: 0x0F2A, e: 1, custom: 1 },
     { sse: 1, opcode: 0x660F2A, e: 1, custom: 1 },
-    { sse: 1, opcode: 0xF20F2A, e: 1, },
-    { sse: 1, opcode: 0xF30F2A, e: 1, },
+    { sse: 1, opcode: 0xF20F2A, e: 1, custom: 1 },
+    { sse: 1, opcode: 0xF30F2A, e: 1, custom: 1 },
     { sse: 1, opcode: 0x0F2B, reg_ud: 1, e: 1, custom: 1 },
     { sse: 1, opcode: 0x660F2B, reg_ud: 1, e: 1, custom: 1 },
 
diff --git a/src/rust/cpu/instructions_0f.rs b/src/rust/cpu/instructions_0f.rs
index e07a89f6..d13146d3 100644
--- a/src/rust/cpu/instructions_0f.rs
+++ b/src/rust/cpu/instructions_0f.rs
@@ -929,17 +929,17 @@ pub unsafe fn instr_660F2A_reg(r1: i32, r2: i32) { instr_660F2A(read_mmx64s(r1),
 pub unsafe fn instr_660F2A_mem(addr: i32, r: i32) {
     instr_660F2A(return_on_pagefault!(safe_read64s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_F20F2A(source: i32, r: i32) {
     // cvtsi2sd xmm, r32/m32
     // This cast can't fail
     write_xmm_f64(r, source as f64);
 }
-#[no_mangle]
 pub unsafe fn instr_F20F2A_reg(r1: i32, r2: i32) { instr_F20F2A(read_reg32(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_F20F2A_mem(addr: i32, r: i32) {
     instr_F20F2A(return_on_pagefault!(safe_read32s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_F30F2A(source: i32, r: i32) {
     // cvtsi2ss xmm, r/m32
     // Note: This cast can fail
@@ -947,9 +947,7 @@ pub unsafe fn instr_F30F2A(source: i32, r: i32) {
     let result = source as f32;
     write_xmm_f32(r, result);
 }
-#[no_mangle]
 pub unsafe fn instr_F30F2A_reg(r1: i32, r2: i32) { instr_F30F2A(read_reg32(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_F30F2A_mem(addr: i32, r: i32) {
     instr_F30F2A(return_on_pagefault!(safe_read32s(addr)), r);
 }
diff --git a/src/rust/jit_instructions.rs b/src/rust/jit_instructions.rs
index 319130b8..b8a92d36 100644
--- a/src/rust/jit_instructions.rs
+++ b/src/rust/jit_instructions.rs
@@ -5112,6 +5112,26 @@ pub fn instr_660F2A_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32)
 pub fn instr_660F2A_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
     mmx_read64_mm_mm(ctx, "instr_660F2A", r1, r2);
 }
+pub fn instr_F20F2A_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    codegen::gen_modrm_resolve_safe_read32(ctx, modrm_byte);
+    ctx.builder.const_i32(r as i32);
+    ctx.builder.call_fn2("instr_F20F2A")
+}
+pub fn instr_F20F2A_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    codegen::gen_get_reg32(ctx, r1);
+    ctx.builder.const_i32(r2 as i32);
+    ctx.builder.call_fn2("instr_F20F2A")
+}
+pub fn instr_F30F2A_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    codegen::gen_modrm_resolve_safe_read32(ctx, modrm_byte);
+    ctx.builder.const_i32(r as i32);
+    ctx.builder.call_fn2("instr_F30F2A")
+}
+pub fn instr_F30F2A_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    codegen::gen_get_reg32(ctx, r1);
+    ctx.builder.const_i32(r2 as i32);
+    ctx.builder.call_fn2("instr_F30F2A")
+}
 
 pub fn instr_0F2B_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
     instr_0F29_mem_jit(ctx, modrm_byte, r)