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jit lodsb

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This commit is contained in:
Fabian 2021-04-09 19:50:20 -05:00
parent b48166280b
commit 2e25308f17
4 changed files with 42 additions and 2 deletions
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2
gen/x86_table.js
View file

@ -239,7 +239,7 @@ const encodings = [
{ opcode: 0xF2AB, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF3AB, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xAC, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xAC, block_boundary: 0, custom: 1, is_string: 1, },
{ opcode: 0xF2AC, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF3AC, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xAD, block_boundary: 1, custom: 1, is_string: 1, os: 1, },

1
src/rust/cpu/string.rs
View file

@ -495,7 +495,6 @@ pub unsafe fn lodsw_rep(is_asize_32: bool, ds: i32) {
pub unsafe fn lodsd_rep(is_asize_32: bool, ds: i32) {
string_instruction(is_asize_32, ds, Instruction::Lods, Size::D, Rep::Z)
}
#[no_mangle]
pub unsafe fn lodsb_no_rep(is_asize_32: bool, ds: i32) {
string_instruction(is_asize_32, ds, Instruction::Lods, Size::B, Rep::None)
}

39
src/rust/jit_instructions.rs
View file

@ -4454,6 +4454,45 @@ fn gen_string_ins(ctx: &mut JitContext, ins: String, size: u8, prefix: u8) {
dbg_assert!(prefix == 0 || prefix == 0xF2 || prefix == 0xF3);
dbg_assert!(size == 8 || size == 16 || size == 32);
if prefix == 0 {
fn get_direction(ctx: &mut JitContext) {
ctx.builder.const_i32(-1);
ctx.builder.const_i32(1);
codegen::gen_get_flags(ctx.builder);
ctx.builder.const_i32(FLAG_DIRECTION);
ctx.builder.and_i32();
ctx.builder.select();
}
match (&ins, size) {
(String::LODS, 8) => {
if ctx.cpu.asize_32() {
codegen::gen_get_reg32(ctx, regs::ESI);
}
else {
codegen::gen_get_reg16(ctx, regs::ESI);
}
jit_add_seg_offset(ctx, regs::DS);
let address_local = ctx.builder.set_new_local();
codegen::gen_safe_read8(ctx, &address_local);
ctx.builder.free_local(address_local);
codegen::gen_set_reg8_unmasked(ctx, regs::AL);
codegen::gen_get_reg32(ctx, regs::ESI);
get_direction(ctx);
ctx.builder.add_i32();
if ctx.cpu.asize_32() {
codegen::gen_set_reg32(ctx, regs::ESI);
}
else {
codegen::gen_set_reg16(ctx, regs::ESI);
}
return;
},
_ => {},
}
}
let mut args = 0;
args += 1;
ctx.builder.const_i32(ctx.cpu.asize_32() as i32);

2
src/rust/wasmgen/wasm_builder.rs
View file

@ -829,6 +829,8 @@ impl WasmBuilder {
pub fn eqz_i32(&mut self) { self.instruction_body.push(op::OP_I32EQZ); }
pub fn select(&mut self) { self.instruction_body.push(op::OP_SELECT); }
pub fn if_i32(&mut self) {
self.open_block();
self.instruction_body.push(op::OP_IF);