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Implement cvtsd2si (#57)

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Fabian 2018-08-01 16:37:22 -04:00
parent 21018b880e
commit 33acb48fb9
5 changed files with 44 additions and 11 deletions
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10
gen/x86_table.js
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@ -501,11 +501,15 @@ const encodings = [
{ sse: 1, opcode: 0x0F2B, reg_ud: 1, e: 1 },
{ sse: 1, opcode: 0x660F2B, reg_ud: 1, e: 1 },
{ sse: 1, opcode: 0xF20F2C, e: 1, },
{ sse: 1, opcode: 0x0F2C, e: 1, skip: 1, },
{ sse: 1, opcode: 0xF30F2C, e: 1, skip: 1, },
{ sse: 1, opcode: 0x660F2C, e: 1, skip: 1, },
{ sse: 1, opcode: 0x0F2D, skip: 1 },
{ sse: 1, opcode: 0xF20F2C, e: 1, },
{ sse: 1, opcode: 0xF30F2C, e: 1, skip: 1, },
{ sse: 1, opcode: 0x0F2D, e: 1, skip: 1, },
{ sse: 1, opcode: 0x660F2D, e: 1, skip: 1, },
{ sse: 1, opcode: 0xF20F2D, e: 1, },
{ sse: 1, opcode: 0xF30F2D, e: 1, skip: 1, },
{ sse: 1, opcode: 0x0F2E, skip: 1 },
{ sse: 1, opcode: 0x0F2F, skip: 1 },

29
src/native/instructions_0f.c
View file

@ -680,10 +680,11 @@ void instr_660F2B_mem(int32_t addr, int32_t r) {
mov_r_m128(addr, r);
}
void instr_0F2C_mem(int32_t addr, int32_t r) { unimplemented_sse(); }
void instr_0F2C_reg(int32_t r1, int32_t r2) { unimplemented_sse(); }
void instr_660F2C_mem(int32_t addr, int32_t r) { unimplemented_sse(); }
void instr_660F2C_reg(int32_t r1, int32_t r2) { unimplemented_sse(); }
void instr_0F2C(union reg64 source, int32_t r) { unimplemented_sse(); }
DEFINE_SSE_SPLIT(instr_0F2C, safe_read64s, read_mmx64s)
void instr_660F2C(union reg128 source, int32_t r) { unimplemented_sse(); }
DEFINE_SSE_SPLIT(instr_660F2C, safe_read128s, read_xmm128s)
void instr_F20F2C(union reg64 source, int32_t r) {
// cvttsd2si r32, xmm/m64
@ -708,10 +709,24 @@ void instr_F20F2C(union reg64 source, int32_t r) {
}
DEFINE_SSE_SPLIT(instr_F20F2C, safe_read64s, read_xmm64s)
void instr_F30F2C_mem(int32_t addr, int32_t r) { unimplemented_sse(); }
void instr_F30F2C_reg(int32_t r1, int32_t r2) { unimplemented_sse(); }
void instr_F30F2C(float_t source, int32_t r) { unimplemented_sse(); }
DEFINE_SSE_SPLIT(instr_F30F2C, fpu_load_m32, read_xmm_f32)
void instr_0F2D(union reg64 source, int32_t r) { unimplemented_sse(); }
DEFINE_SSE_SPLIT(instr_0F2D, safe_read64s, read_mmx64s)
void instr_660F2D(union reg128 source, int32_t r) { unimplemented_sse(); }
DEFINE_SSE_SPLIT(instr_660F2D, safe_read128s, read_xmm128s)
void instr_F20F2D(union reg64 source, int32_t r) {
// cvtsd2si r32, xmm/m64
write_reg32(r, sse_convert_f64_to_i32(source.f64[0]));
}
DEFINE_SSE_SPLIT(instr_F20F2D, safe_read64s, read_xmm64s)
void instr_F30F2D(float_t source, int32_t r) { unimplemented_sse(); }
DEFINE_SSE_SPLIT(instr_F30F2D, fpu_load_m32, read_xmm_f32)
void instr_0F2D() { unimplemented_sse(); }
void instr_0F2E() { unimplemented_sse(); }
void instr_0F2F() { unimplemented_sse(); }

1
src/native/instructions_0f.h
View file

@ -187,7 +187,6 @@ void instr_F20F2C_reg(int32_t r1, int32_t r2);
void instr_F20F2C_mem(int32_t addr, int32_t r);
void instr_F30F2C_mem(int32_t addr, int32_t r);
void instr_F30F2C_reg(int32_t r1, int32_t r2);
void instr_0F2D(void);
void instr_0F2E(void);
void instr_0F2F(void);
void instr_0F30(void);

14
src/native/sse_instr.c
View file

@ -429,3 +429,17 @@ double_t sse_max(double_t x, double_t y)
// if both x and y are 0 or x is nan, y is returned
return x > y ? x : y;
}
int32_t sse_convert_f64_to_i32(double_t x)
{
// TODO: Rounding modes
if(x >= -0x80000000 && x < 0x80000000)
{
return (int64_t)x;
}
else
{
// TODO: Signal
return -0x80000000;
}
}

1
src/native/sse_instr.h
View file

@ -35,3 +35,4 @@ void psllq_r128(int32_t r, uint32_t shift);
bool sse_comparison(int32_t op, double_t x, double_t y);
double_t sse_min(double_t x, double_t y);
double_t sse_max(double_t x, double_t y);
int32_t sse_convert_f64_to_i32(double_t x);