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Apply stack_size_32 cache optimization to push imm

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Amaan Cheval 2018-02-23 10:21:52 +05:30 committed by Fabian
parent 1fd820ce24
commit 3ffb2ac35f
4 changed files with 34 additions and 2 deletions
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4
gen/x86_table.js
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@ -76,9 +76,9 @@ const encodings = [
{ opcode: 0x66, prefix: 1, },
{ opcode: 0x67, prefix: 1, },
{ opcode: 0x68, os: 1, imm1632: 1, },
{ opcode: 0x68, custom: 1, os: 1, imm1632: 1, },
{ opcode: 0x69, nonfaulting: 1, os: 1, e: 1, imm1632: 1, mask_flags: af, }, // zf?
{ opcode: 0x6A, os: 1, imm8s: 1, },
{ opcode: 0x6A, custom: 1, os: 1, imm8s: 1, },
{ opcode: 0x6B, nonfaulting: 1, os: 1, e: 1, imm8s: 1, mask_flags: af, }, // zf?
{ opcode: 0x6C, jump: 1, is_string: 1, skip: 1, }, // ins

6
src/native/instructions.c
View file

@ -344,6 +344,9 @@ jit_instr_flags instr_67_jit() {
void instr16_68(int32_t imm16) { push16(imm16); }
void instr32_68(int32_t imm32) { push32(imm32); }
void instr16_68_jit(int32_t imm16) { push16_imm_jit(imm16); }
void instr32_68_jit(int32_t imm32) { push32_imm_jit(imm32); }
void instr16_69_mem(int32_t addr, int32_t r, int32_t imm) { write_reg16(r, imul_reg16(safe_read16(addr) << 16 >> 16, imm << 16 >> 16)); }
void instr16_69_reg(int32_t r1, int32_t r, int32_t imm) { write_reg16(r, imul_reg16(read_reg16(r1) << 16 >> 16, imm << 16 >> 16)); }
void instr32_69_mem(int32_t addr, int32_t r, int32_t imm) { write_reg32(r, imul_reg32(safe_read32s(addr), imm)); }
@ -352,6 +355,9 @@ void instr32_69_reg(int32_t r1, int32_t r, int32_t imm) { write_reg32(r, imul_re
void instr16_6A(int32_t imm8) { push16(imm8); }
void instr32_6A(int32_t imm8) { push32(imm8); }
void instr16_6A_jit(int32_t imm8) { push16_imm_jit(imm8); }
void instr32_6A_jit(int32_t imm8) { push32_imm_jit(imm8); }
void instr16_6B_mem(int32_t addr, int32_t r, int32_t imm) { write_reg16(r, imul_reg16(safe_read16(addr) << 16 >> 16, imm)); }
void instr16_6B_reg(int32_t r1, int32_t r, int32_t imm) { write_reg16(r, imul_reg16(read_reg16(r1) << 16 >> 16, imm)); }
void instr32_6B_mem(int32_t addr, int32_t r, int32_t imm) { write_reg32(r, imul_reg32(safe_read32s(addr), imm)); }

24
src/native/misc_instr.c
View file

@ -286,6 +286,18 @@ void push16_reg_jit(int32_t reg)
}
}
void push16_imm_jit(int32_t imm)
{
if(*stack_size_32)
{
gen_fn1("push16_ss32", 11, imm);
}
else
{
gen_fn1("push16_ss16", 11, imm);
}
}
__attribute__((always_inline))
void push32_ss16(int32_t imm32)
{
@ -327,6 +339,18 @@ void push32_reg_jit(int32_t reg)
}
}
void push32_imm_jit(int32_t imm)
{
if(*stack_size_32)
{
gen_fn1("push32_ss32", 11, imm);
}
else
{
gen_fn1("push32_ss16", 11, imm);
}
}
__attribute__((always_inline))
int32_t pop16_ss16()
{

2
src/native/misc_instr.h
View file

@ -45,10 +45,12 @@ void push16_ss16(int32_t imm16);
void push16_ss32(int32_t imm16);
void push16(int32_t imm16);
void push16_reg_jit(int32_t reg);
void push16_imm_jit(int32_t imm);
void push32_ss16(int32_t imm32);
void push32_ss32(int32_t imm32);
void push32(int32_t imm32);
void push32_reg_jit(int32_t reg);
void push32_imm_jit(int32_t imm);
int32_t pop16(void);
void pop16_reg_jit(int32_t reg);
int32_t pop32_ss16(void);