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Delete more JS (port lss and enter)

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This commit is contained in:
Fabian 2020-12-31 19:14:30 -06:00
parent d9bfbad2f6
commit 5bfd56571c
5 changed files with 96 additions and 117 deletions
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8
src/browser/starter.js
View file

@ -113,8 +113,7 @@ function V86Starter(options)
"logop": function(eip, op) { return cpu.debug.logop(eip, op); },
"microtick": v86.microtick,
"get_rand_int": function() { return v86util.get_rand_int(); },
"dbg_trace": function()
{
"dbg_trace": function() {
dbg_trace();
},
@ -151,11 +150,6 @@ function V86Starter(options)
"load_ldt": function() { return cpu.load_ldt.apply(cpu, arguments); },
"load_tr": function() { return cpu.load_tr.apply(cpu, arguments); },
"lss16": function() { return cpu.lss16.apply(cpu, arguments); },
"lss32": function() { return cpu.lss32.apply(cpu, arguments); },
"enter16": function() { return cpu.enter16.apply(cpu, arguments); },
"enter32": function() { return cpu.enter32.apply(cpu, arguments); },
"Math_atan2": Math.atan2,
"Math_tan": Math.tan,
// https://github.com/rust-lang/rust/blob/56e46255b39058725d25e74200e03c0c70a0d0d3/src/etc/wasm32-shim.js#L105-L117

92
src/cpu.js
View file

@ -298,7 +298,6 @@ CPU.prototype.wasm_patch = function(wm)
this.translate_address_system_write = get_import("translate_address_system_write_js");
this.get_seg_cs = get_import("get_seg_cs");
this.get_seg_ss = get_import("get_seg_ss");
this.adjust_stack_reg = get_import("adjust_stack_reg");
this.get_real_eip = get_import("get_real_eip");
this.get_stack_pointer = get_import("get_stack_pointer");
@ -3003,97 +3002,6 @@ CPU.prototype.verw = function(selector)
}
};
CPU.prototype.lss16 = function(addr, reg, seg)
{
var new_reg = this.safe_read16(addr),
new_seg = this.safe_read16(addr + 2 | 0);
if(!this.switch_seg(seg, new_seg)) return;
this.reg16[reg] = new_reg;
};
CPU.prototype.lss32 = function(addr, reg, seg)
{
var new_reg = this.safe_read32s(addr),
new_seg = this.safe_read16(addr + 4 | 0);
if(!this.switch_seg(seg, new_seg)) return;
this.reg32[reg] = new_reg;
};
CPU.prototype.enter16 = function(size, nesting_level)
{
nesting_level &= 31;
if(nesting_level) dbg_log("enter16 stack=" + (this.stack_size_32[0] ? 32 : 16) + " size=" + size + " nest=" + nesting_level, LOG_CPU);
var ss_mask = this.stack_size_32[0] ? -1 : 0xFFFF;
var ss = this.get_seg_ss();
var frame_temp = this.reg32[reg_esp] - 2;
if(nesting_level > 0)
{
var tmp_ebp = this.reg32[reg_ebp];
for(var i = 1; i < nesting_level; i++)
{
tmp_ebp -= 2;
this.push16(this.safe_read16(ss + (tmp_ebp & ss_mask) | 0));
}
this.push16(frame_temp);
}
// check if write to final stack pointer would case a page fault
if(!this.writable_or_pagefault(ss + (frame_temp - size & ss_mask), 2))
{
return;
}
this.safe_write16(ss + (frame_temp & ss_mask) | 0, this.reg16[reg_bp]);
this.reg16[reg_bp] = frame_temp;
this.adjust_stack_reg(-size - 2);
};
CPU.prototype.enter32 = function(size, nesting_level)
{
nesting_level &= 31;
if(nesting_level) dbg_log("enter32 stack=" + (this.stack_size_32[0] ? 32 : 16) + " size=" + size + " nest=" + nesting_level, LOG_CPU);
var ss_mask = this.stack_size_32[0] ? -1 : 0xFFFF;
var ss = this.get_seg_ss();
var frame_temp = this.reg32[reg_esp] - 4;
if(nesting_level > 0)
{
var tmp_ebp = this.reg32[reg_ebp];
for(var i = 1; i < nesting_level; i++)
{
tmp_ebp -= 4;
this.push32(this.safe_read32s(ss + (tmp_ebp & ss_mask) | 0));
}
this.push32(frame_temp);
}
// check if write to final stack pointer would case a page fault
if(!this.writable_or_pagefault(ss + (frame_temp - size & ss_mask), 4))
{
return;
}
this.safe_write32(ss + (frame_temp & ss_mask) | 0, this.reg32[reg_ebp]);
this.reg32[reg_ebp] = frame_temp;
this.adjust_stack_reg(-size - 4);
};
CPU.prototype.bswap = function(reg)
{
var temp = this.reg32[reg];
this.reg32[reg] = temp >>> 24 | temp << 24 | (temp >> 8 & 0xFF00) | (temp << 8 & 0xFF0000);
};
// Closure Compiler's way of exporting
if(typeof window !== "undefined")
{

13
src/rust/cpu2/instructions.rs
View file

@ -1,15 +1,6 @@
#![allow(non_snake_case, unused_variables)]
extern "C" {
#[no_mangle]
fn lss16(x: i32, y: i32, z: i32);
#[no_mangle]
fn lss32(x: i32, y: i32, z: i32);
#[no_mangle]
fn enter16(size: i32, nesting_level: i32);
#[no_mangle]
fn enter32(size: i32, nesting_level: i32);
#[no_mangle]
fn arpl(seg: i32, r: i32) -> i32;
#[no_mangle]
@ -1900,7 +1891,7 @@ pub unsafe fn instr32_C3() {
#[no_mangle]
pub unsafe fn instr16_C4_reg(_unused1: i32, _unused2: i32) { trigger_ud(); }
#[no_mangle]
pub unsafe fn instr16_C4_mem(addr: i32, r: i32) { lss16(addr, get_reg16_index(r), ES); }
pub unsafe fn instr16_C4_mem(addr: i32, r: i32) { lss16(addr, r, ES); }
#[no_mangle]
pub unsafe fn instr32_C4_reg(_unused1: i32, _unused2: i32) { trigger_ud(); }
#[no_mangle]
@ -1908,7 +1899,7 @@ pub unsafe fn instr32_C4_mem(addr: i32, r: i32) { lss32(addr, r, ES); }
#[no_mangle]
pub unsafe fn instr16_C5_reg(_unused1: i32, _unused2: i32) { trigger_ud(); }
#[no_mangle]
pub unsafe fn instr16_C5_mem(addr: i32, r: i32) { lss16(addr, get_reg16_index(r), DS); }
pub unsafe fn instr16_C5_mem(addr: i32, r: i32) { lss16(addr, r, DS); }
#[no_mangle]
pub unsafe fn instr32_C5_reg(_unused1: i32, _unused2: i32) { trigger_ud(); }
#[no_mangle]

11
src/rust/cpu2/instructions_0f.rs
View file

@ -1,10 +1,6 @@
#![allow(non_snake_case, non_upper_case_globals, unused_variables)]
extern "C" {
#[no_mangle]
fn lss16(x: i32, y: i32, z: i32);
#[no_mangle]
fn lss32(x: i32, y: i32, z: i32);
#[no_mangle]
fn get_rand_int() -> i32;
#[no_mangle]
@ -50,6 +46,7 @@ use cpu2::misc_instr::{
jmpcc32, push16, push32, setcc_mem, setcc_reg, test_b, test_be, test_l, test_le, test_o,
test_p, test_s, test_z,
};
use cpu2::misc_instr::{lss16, lss32};
use cpu2::sse_instr::*;
#[no_mangle]
@ -3220,7 +3217,7 @@ pub unsafe fn instr32_0FB1_mem(addr: i32, r: i32) {
#[no_mangle]
pub unsafe fn instr16_0FB2_reg(unused: i32, unused2: i32) { trigger_ud(); }
#[no_mangle]
pub unsafe fn instr16_0FB2_mem(addr: i32, r: i32) { lss16(addr, get_reg16_index(r), SS); }
pub unsafe fn instr16_0FB2_mem(addr: i32, r: i32) { lss16(addr, r, SS); }
#[no_mangle]
pub unsafe fn instr32_0FB2_reg(unused: i32, unused2: i32) { trigger_ud(); }
#[no_mangle]
@ -3240,7 +3237,7 @@ pub unsafe fn instr32_0FB3_mem(addr: i32, r: i32) { btr_mem(addr, read_reg32(r))
#[no_mangle]
pub unsafe fn instr16_0FB4_reg(unused: i32, unused2: i32) { trigger_ud(); }
#[no_mangle]
pub unsafe fn instr16_0FB4_mem(addr: i32, r: i32) { lss16(addr, get_reg16_index(r), FS); }
pub unsafe fn instr16_0FB4_mem(addr: i32, r: i32) { lss16(addr, r, FS); }
#[no_mangle]
pub unsafe fn instr32_0FB4_reg(unused: i32, unused2: i32) { trigger_ud(); }
#[no_mangle]
@ -3248,7 +3245,7 @@ pub unsafe fn instr32_0FB4_mem(addr: i32, r: i32) { lss32(addr, r, FS); }
#[no_mangle]
pub unsafe fn instr16_0FB5_reg(unused: i32, unused2: i32) { trigger_ud(); }
#[no_mangle]
pub unsafe fn instr16_0FB5_mem(addr: i32, r: i32) { lss16(addr, get_reg16_index(r), GS); }
pub unsafe fn instr16_0FB5_mem(addr: i32, r: i32) { lss16(addr, r, GS); }
#[no_mangle]
pub unsafe fn instr32_0FB5_reg(unused: i32, unused2: i32) { trigger_ud(); }
#[no_mangle]

89
src/rust/cpu2/misc_instr.rs
View file

@ -277,6 +277,95 @@ pub unsafe fn pusha32() {
push32(*reg32.offset(ESI as isize)).unwrap();
push32(*reg32.offset(EDI as isize)).unwrap();
}
pub unsafe fn lss16(addr: i32, reg: i32, seg: i32) {
let new_reg = return_on_pagefault!(safe_read16(addr));
let new_seg = return_on_pagefault!(safe_read16(addr + 2));
if !switch_seg(seg, new_seg) {
return;
}
write_reg16(reg, new_reg);
}
pub unsafe fn lss32(addr: i32, reg: i32, seg: i32) {
let new_reg = return_on_pagefault!(safe_read32s(addr));
let new_seg = return_on_pagefault!(safe_read16(addr + 4));
if !switch_seg(seg, new_seg) {
return;
}
write_reg32(reg, new_reg);
}
pub unsafe fn enter16(size: i32, mut nesting_level: i32) {
nesting_level &= 31;
if nesting_level > 0 {
dbg_log!(
"enter16 stack={} size={} nest={}",
(if *stack_size_32 { 16 } else { 32 }),
size,
nesting_level,
);
}
let ss_mask = if *stack_size_32 { -1 } else { 0xFFFF };
let ss = get_seg_ss();
let frame_temp = *reg32.offset(ESP as isize) - 2;
if nesting_level > 0 {
let mut tmp_ebp = *reg32.offset(EBP as isize);
for _ in 1..nesting_level {
tmp_ebp -= 2;
push16(safe_read16(ss + (tmp_ebp & ss_mask)).unwrap()).unwrap();
}
push16(frame_temp).unwrap();
}
return_on_pagefault!(safe_write16(
ss + (frame_temp & ss_mask),
*reg16.offset(BP as isize) as i32,
));
*reg16.offset(BP as isize) = frame_temp as u16;
adjust_stack_reg(-size - 2);
}
pub unsafe fn enter32(size: i32, mut nesting_level: i32) {
nesting_level &= 31;
if nesting_level > 0 {
dbg_log!(
"enter32 stack={} size={} nest={}",
(if *stack_size_32 { 16 } else { 32 }),
size,
nesting_level,
);
}
let ss_mask = if *stack_size_32 { -1 } else { 0xFFFF };
let ss = get_seg_ss();
let frame_temp = *reg32.offset(ESP as isize) - 4;
if nesting_level > 0 {
let mut tmp_ebp = *reg32.offset(EBP as isize);
for _ in 1..nesting_level {
tmp_ebp -= 4;
push32(safe_read32s(ss + (tmp_ebp & ss_mask)).unwrap()).unwrap();
}
push32(frame_temp).unwrap();
}
return_on_pagefault!(safe_write32(
ss + (frame_temp & ss_mask),
*reg32.offset(EBP as isize)
));
*reg32.offset(EBP as isize) = frame_temp;
adjust_stack_reg(-size - 4);
}
#[no_mangle]
pub unsafe fn setcc_reg(condition: bool, r: i32) { write_reg8(r, condition as i32); }
#[no_mangle]