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c2rust cleanup: Use bool

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This commit is contained in:
Fabian 2020-12-31 19:14:29 -06:00
parent 034ecd5390
commit 80a69939a1
5 changed files with 94 additions and 141 deletions
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20
src/rust/cpu2/arith.rs
View file

@ -327,14 +327,14 @@ pub unsafe fn cmpxchg32(data: i32, r: i32) -> i32 {
#[no_mangle]
pub unsafe fn bcd_daa() {
let old_al = *reg8.offset(AL as isize) as i32;
let old_cf = getcf() as i32;
let old_af = getaf() as i32;
let old_cf = getcf();
let old_af = getaf();
*flags &= !1 & !FLAG_ADJUST;
if old_al & 15 > 9 || 0 != old_af {
if old_al & 15 > 9 || old_af {
*reg8.offset(AL as isize) += 6;
*flags |= FLAG_ADJUST
}
if old_al > 153 || 0 != old_cf {
if old_al > 153 || old_cf {
*reg8.offset(AL as isize) += 96;
*flags |= 1
}
@ -347,17 +347,17 @@ pub unsafe fn bcd_daa() {
#[no_mangle]
pub unsafe fn bcd_das() {
let old_al = *reg8.offset(AL as isize) as i32;
let old_cf = getcf() as i32;
let old_cf = getcf();
*flags &= !1;
if old_al & 15 > 9 || 0 != getaf() as i32 {
if old_al & 15 > 9 || getaf() {
*reg8.offset(AL as isize) -= 6;
*flags |= FLAG_ADJUST;
*flags = *flags & !1 | old_cf | (old_al < 6) as i32
*flags = *flags & !1 | old_cf as i32 | (old_al < 6) as i32
}
else {
*flags &= !FLAG_ADJUST
}
if old_al > 153 || 0 != old_cf {
if old_al > 153 || old_cf {
*reg8.offset(AL as isize) -= 96;
*flags |= 1
}
@ -396,7 +396,7 @@ pub unsafe fn bcd_aam(imm8: i32) {
}
#[no_mangle]
pub unsafe fn bcd_aaa() {
if *reg8.offset(AL as isize) as i32 & 15 > 9 || 0 != getaf() as i32 {
if *reg8.offset(AL as isize) as i32 & 15 > 9 || getaf() {
*reg16.offset(AX as isize) += 6;
*reg8.offset(AH as isize) += 1;
*flags |= FLAG_ADJUST | 1
@ -409,7 +409,7 @@ pub unsafe fn bcd_aaa() {
}
#[no_mangle]
pub unsafe fn bcd_aas() {
if *reg8.offset(AL as isize) as i32 & 15 > 9 || 0 != getaf() as i32 {
if *reg8.offset(AL as isize) as i32 & 15 > 9 || getaf() {
*reg16.offset(AX as isize) -= 6;
*reg8.offset(AH as isize) -= 1;
*flags |= FLAG_ADJUST | 1

53
src/rust/cpu2/cpu.rs
View file

@ -1017,7 +1017,7 @@ pub unsafe fn translate_address_read(address: i32) -> OrPageFault<u32> {
let base = (address as u32 >> 12) as i32;
let entry = *tlb_data.offset(base as isize);
let user = *cpl as i32 == 3;
if entry & (TLB_VALID | if 0 != user as i32 { TLB_NO_USER } else { 0 }) == TLB_VALID {
if entry & (TLB_VALID | if user { TLB_NO_USER } else { 0 }) == TLB_VALID {
Ok((entry & !0xFFF ^ address) as u32)
}
else {
@ -1029,7 +1029,7 @@ pub unsafe fn translate_address_read_jit(address: i32) -> OrPageFault<u32> {
let base = (address as u32 >> 12) as i32;
let entry = *tlb_data.offset(base as isize);
let user = *cpl as i32 == 3;
if entry & (TLB_VALID | if 0 != user as i32 { TLB_NO_USER } else { 0 }) == TLB_VALID {
if entry & (TLB_VALID | if user { TLB_NO_USER } else { 0 }) == TLB_VALID {
Ok((entry & !0xFFF ^ address) as u32)
}
else {
@ -1218,39 +1218,23 @@ pub unsafe fn do_page_walk(addr: i32, for_writing: bool, user: bool) -> Result<i
}
let is_in_mapped_range = in_mapped_range(high as u32);
let physical_page = (high as u32 >> 12) as i32;
let has_code =
!is_in_mapped_range && 0 != ::c_api::jit_page_has_code(physical_page as u32) as i32;
let has_code = !is_in_mapped_range && ::c_api::jit_page_has_code(physical_page as u32);
let info_bits = TLB_VALID
| if 0 != can_write as i32 {
0
}
else {
TLB_READONLY
}
| if 0 != allow_user as i32 {
0
}
else {
TLB_NO_USER
}
| if 0 != is_in_mapped_range as i32 {
| if can_write { 0 } else { TLB_READONLY }
| if allow_user { 0 } else { TLB_NO_USER }
| if is_in_mapped_range {
TLB_IN_MAPPED_RANGE
}
else {
0
}
| if 0 != global as i32 && 0 != *cr.offset(4) & CR4_PGE {
| if global && 0 != *cr.offset(4) & CR4_PGE {
TLB_GLOBAL
}
else {
0
}
| if 0 != has_code as i32 {
TLB_HAS_CODE
}
else {
0
};
| if has_code { TLB_HAS_CODE } else { 0 };
dbg_assert!((high ^ page << 12) & 0xFFF == 0);
*tlb_data.offset(page as isize) = high ^ page << 12 | info_bits;
return Ok(high);
@ -1399,9 +1383,7 @@ pub unsafe fn translate_address_write(address: i32) -> OrPageFault<u32> {
let base = (address as u32 >> 12) as i32;
let entry = *tlb_data.offset(base as isize);
let user = *cpl as i32 == 3;
if entry & (TLB_VALID | if 0 != user as i32 { TLB_NO_USER } else { 0 } | TLB_READONLY)
== TLB_VALID
{
if entry & (TLB_VALID | if user { TLB_NO_USER } else { 0 } | TLB_READONLY) == TLB_VALID {
return Ok((entry & !0xFFF ^ address) as u32);
}
else {
@ -1413,9 +1395,7 @@ pub unsafe fn translate_address_write_jit(address: i32) -> OrPageFault<u32> {
let base = (address as u32 >> 12) as i32;
let entry = *tlb_data.offset(base as isize);
let user = *cpl as i32 == 3;
if entry & (TLB_VALID | if 0 != user as i32 { TLB_NO_USER } else { 0 } | TLB_READONLY)
== TLB_VALID
{
if entry & (TLB_VALID | if user { TLB_NO_USER } else { 0 } | TLB_READONLY) == TLB_VALID {
Ok((entry & !0xFFF ^ address) as u32)
}
else {
@ -1438,7 +1418,7 @@ pub unsafe fn tlb_set_has_code(physical_page: Page, has_code: bool) {
if 0 != entry {
let tlb_physical_page = entry as u32 >> 12 ^ page as u32;
if physical_page == tlb_physical_page {
*tlb_data.offset(page as isize) = if 0 != has_code as i32 {
*tlb_data.offset(page as isize) = if has_code {
entry | TLB_HAS_CODE
}
else {
@ -1475,7 +1455,7 @@ pub unsafe fn writable_or_pagefault(addr: i32, size: i32) -> OrPageFault<()> {
}
else {
let user = *cpl as i32 == 3;
let mask = TLB_READONLY | TLB_VALID | if 0 != user as i32 { TLB_NO_USER } else { 0 };
let mask = TLB_READONLY | TLB_VALID | if user { TLB_NO_USER } else { 0 };
let expect = TLB_VALID;
let page = (addr as u32 >> 12) as i32;
if *tlb_data.offset(page as isize) & mask != expect {
@ -1501,7 +1481,7 @@ pub unsafe fn writable_or_pagefault_jit(addr: i32, size: i32) -> OrPageFault<()>
}
else {
let user = *cpl as i32 == 3;
let mask = TLB_READONLY | TLB_VALID | if 0 != user as i32 { TLB_NO_USER } else { 0 };
let mask = TLB_READONLY | TLB_VALID | if user { TLB_NO_USER } else { 0 };
let expect = TLB_VALID;
let page = (addr as u32 >> 12) as i32;
if *tlb_data.offset(page as isize) & mask != expect {
@ -1560,12 +1540,11 @@ pub unsafe fn read_imm32s() -> OrPageFault<i32> {
}
pub unsafe fn is_osize_32() -> bool {
return *is_32 as i32 != (*prefixes as i32 & PREFIX_MASK_OPSIZE == PREFIX_MASK_OPSIZE) as i32;
return *is_32 != (*prefixes as i32 & PREFIX_MASK_OPSIZE == PREFIX_MASK_OPSIZE);
}
pub unsafe fn is_asize_32() -> bool {
return *is_32 as i32
!= (*prefixes as i32 & PREFIX_MASK_ADDRSIZE == PREFIX_MASK_ADDRSIZE) as i32;
return *is_32 != (*prefixes as i32 & PREFIX_MASK_ADDRSIZE == PREFIX_MASK_ADDRSIZE);
}
pub unsafe fn lookup_segment_selector(
@ -2882,7 +2861,7 @@ pub unsafe fn add_reg_asize(reg: i32, value: i32) {
}
pub unsafe fn decr_ecx_asize() -> i32 {
return if 0 != is_asize_32() as i32 {
return if is_asize_32() {
*reg32.offset(ECX as isize) -= 1;
*reg32.offset(ECX as isize)
}

58
src/rust/cpu2/instructions.rs
View file

@ -893,7 +893,7 @@ pub unsafe fn instr_62_mem(addr: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr_63_mem(addr: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("arpl #ud");
trigger_ud();
return;
@ -902,7 +902,7 @@ pub unsafe fn instr_63_mem(addr: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr_63_reg(r1: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("arpl #ud");
trigger_ud();
return;
@ -924,7 +924,7 @@ pub unsafe fn instr_66() {
#[no_mangle]
pub unsafe fn instr_67() {
// Address-size override prefix
dbg_assert!(is_asize_32() as i32 == *is_32 as i32);
dbg_assert!(is_asize_32() == *is_32);
*prefixes = (*prefixes as i32 | PREFIX_MASK_ADDRSIZE) as u8;
run_prefix_instruction();
*prefixes = 0;
@ -1681,17 +1681,17 @@ pub unsafe fn instr32_99() { *reg32.offset(EDX as isize) = *reg32.offset(EAX as
pub unsafe fn instr16_9A(new_ip: i32, new_cs: i32) {
// callf
far_jump(new_ip, new_cs, true);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr32_9A(new_ip: i32, new_cs: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
if 0 != new_ip as u32 & 0xFFFF0000 {
dbg_assert!(false);
}
}
far_jump(new_ip, new_cs, true);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr_9B() {
@ -2110,7 +2110,7 @@ pub unsafe fn instr16_C2(imm16: i32) {
// retn
let cs = get_seg_cs();
*instruction_pointer = cs + return_on_pagefault!(pop16());
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
adjust_stack_reg(imm16);
}
#[no_mangle]
@ -2118,7 +2118,7 @@ pub unsafe fn instr32_C2(imm16: i32) {
// retn
let cs = get_seg_cs();
let ip = return_on_pagefault!(pop32s());
dbg_assert!(0 != is_asize_32() as i32 || ip < 0x10000);
dbg_assert!(is_asize_32() || ip < 0x10000);
*instruction_pointer = cs + ip;
adjust_stack_reg(imm16);
}
@ -2133,7 +2133,7 @@ pub unsafe fn instr32_C3() {
// retn
let cs = get_seg_cs();
let ip = return_on_pagefault!(pop32s());
dbg_assert!(0 != is_asize_32() as i32 || ip < 0x10000);
dbg_assert!(is_asize_32() || ip < 0x10000);
*instruction_pointer = cs + ip;
}
#[no_mangle]
@ -2177,7 +2177,7 @@ pub unsafe fn instr32_C8(size: i32, nesting: i32) { enter32(size, nesting); }
#[no_mangle]
pub unsafe fn instr16_C9() {
// leave
let old_vbp = if 0 != *stack_size_32 as i32 {
let old_vbp = if *stack_size_32 {
*reg32.offset(EBP as isize)
}
else {
@ -2189,7 +2189,7 @@ pub unsafe fn instr16_C9() {
}
#[no_mangle]
pub unsafe fn instr32_C9() {
let old_vbp = if 0 != *stack_size_32 as i32 {
let old_vbp = if *stack_size_32 {
*reg32.offset(EBP as isize)
}
else {
@ -2212,7 +2212,7 @@ pub unsafe fn instr32_CA(imm16: i32) {
let ip = return_on_pagefault!(safe_read32s(get_stack_pointer(0)));
let cs = return_on_pagefault!(safe_read32s(get_stack_pointer(4))) & 0xFFFF;
far_return(ip, cs, imm16);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr16_CB() {
@ -2220,7 +2220,7 @@ pub unsafe fn instr16_CB() {
let ip = return_on_pagefault!(safe_read16(get_stack_pointer(0)));
let cs = return_on_pagefault!(safe_read16(get_stack_pointer(2)));
far_return(ip, cs, 0);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr32_CB() {
@ -2228,7 +2228,7 @@ pub unsafe fn instr32_CB() {
let ip = return_on_pagefault!(safe_read32s(get_stack_pointer(0)));
let cs = return_on_pagefault!(safe_read32s(get_stack_pointer(4))) & 0xFFFF;
far_return(ip, cs, 0);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr_CC() {
@ -2796,19 +2796,19 @@ pub unsafe fn instr16_E9(imm16: i32) {
pub unsafe fn instr32_E9(imm32s: i32) {
// jmp
*instruction_pointer = *instruction_pointer + imm32s;
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr16_EA(new_ip: i32, cs: i32) {
// jmpf
far_jump(new_ip, cs, false);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr32_EA(new_ip: i32, cs: i32) {
// jmpf
far_jump(new_ip, cs, false);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr_EC() {
@ -3286,7 +3286,7 @@ pub unsafe fn instr16_FF_2_helper(data: i32) {
let cs = get_seg_cs();
return_on_pagefault!(push16(get_real_eip()));
*instruction_pointer = cs + data;
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr16_FF_2_mem(addr: i32) {
@ -3309,13 +3309,13 @@ pub unsafe fn instr16_FF_3_mem(addr: i32) {
let new_ip = return_on_pagefault!(safe_read16(addr));
let new_cs = return_on_pagefault!(safe_read16(addr + 2));
far_jump(new_ip, new_cs, true);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr16_FF_4_helper(data: i32) {
// jmp near
*instruction_pointer = get_seg_cs() + data;
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr16_FF_4_mem(addr: i32) {
@ -3338,7 +3338,7 @@ pub unsafe fn instr16_FF_5_mem(addr: i32) {
let new_ip = return_on_pagefault!(safe_read16(addr));
let new_cs = return_on_pagefault!(safe_read16(addr + 2));
far_jump(new_ip, new_cs, false);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr16_FF_6_mem(addr: i32) {
@ -3373,7 +3373,7 @@ pub unsafe fn instr32_FF_2_helper(data: i32) {
// call near
let cs = get_seg_cs();
return_on_pagefault!(push32(get_real_eip()));
dbg_assert!(0 != is_asize_32() as i32 || data < 0x10000);
dbg_assert!(is_asize_32() || data < 0x10000);
*instruction_pointer = cs + data;
}
#[no_mangle]
@ -3396,18 +3396,18 @@ pub unsafe fn instr32_FF_3_mem(addr: i32) {
// callf
let new_ip = return_on_pagefault!(safe_read32s(addr));
let new_cs = return_on_pagefault!(safe_read16(addr + 4));
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
if 0 != new_ip as u32 & 0xFFFF0000 {
dbg_assert!(false);
}
}
far_jump(new_ip, new_cs, true);
dbg_assert!(0 != is_asize_32() as i32 || new_ip < 0x10000);
dbg_assert!(is_asize_32() || new_ip < 0x10000);
}
#[no_mangle]
pub unsafe fn instr32_FF_4_helper(data: i32) {
// jmp near
dbg_assert!(0 != is_asize_32() as i32 || data < 0x10000);
dbg_assert!(is_asize_32() || data < 0x10000);
*instruction_pointer = get_seg_cs() + data;
}
#[no_mangle]
@ -3430,13 +3430,13 @@ pub unsafe fn instr32_FF_5_mem(addr: i32) {
// jmpf
let new_ip = return_on_pagefault!(safe_read32s(addr));
let new_cs = return_on_pagefault!(safe_read16(addr + 4));
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
if 0 != new_ip as u32 & 0xFFFF0000 {
dbg_assert!(false);
}
}
far_jump(new_ip, new_cs, false);
dbg_assert!(0 != is_asize_32() as i32 || new_ip < 0x10000);
dbg_assert!(is_asize_32() || new_ip < 0x10000);
}
#[no_mangle]
pub unsafe fn instr32_FF_6_mem(addr: i32) {
@ -4160,11 +4160,11 @@ pub unsafe fn instr32_E3(imm8s: i32) { jcxz32(imm8s); }
pub unsafe fn instr16_EB(imm8: i32) {
// jmp near
jmp_rel16(imm8);
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}
#[no_mangle]
pub unsafe fn instr32_EB(imm8: i32) {
// jmp near
*instruction_pointer = *instruction_pointer + imm8;
dbg_assert!(0 != is_asize_32() as i32 || get_real_eip() < 0x10000);
dbg_assert!(is_asize_32() || get_real_eip() < 0x10000);
}

88
src/rust/cpu2/instructions_0f.rs
View file

@ -53,7 +53,7 @@ const ENABLE_ACPI: bool = false;
#[no_mangle]
pub unsafe fn instr_0F00_0_mem(addr: i32) {
// sldt
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -64,7 +64,7 @@ pub unsafe fn instr_0F00_0_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_0_reg(r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -76,7 +76,7 @@ pub unsafe fn instr_0F00_0_reg(r: i32) {
#[no_mangle]
pub unsafe fn instr_0F00_1_mem(addr: i32) {
// str
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -87,7 +87,7 @@ pub unsafe fn instr_0F00_1_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_1_reg(r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -99,7 +99,7 @@ pub unsafe fn instr_0F00_1_reg(r: i32) {
#[no_mangle]
pub unsafe fn instr_0F00_2_mem(addr: i32) {
// lldt
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -114,7 +114,7 @@ pub unsafe fn instr_0F00_2_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_2_reg(r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -130,7 +130,7 @@ pub unsafe fn instr_0F00_2_reg(r: i32) {
#[no_mangle]
pub unsafe fn instr_0F00_3_mem(addr: i32) {
// ltr
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -145,7 +145,7 @@ pub unsafe fn instr_0F00_3_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_3_reg(r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
trigger_ud();
return;
}
@ -160,7 +160,7 @@ pub unsafe fn instr_0F00_3_reg(r: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_4_mem(addr: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("verr #ud");
trigger_ud();
return;
@ -169,7 +169,7 @@ pub unsafe fn instr_0F00_4_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_4_reg(r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("verr #ud");
trigger_ud();
return;
@ -178,7 +178,7 @@ pub unsafe fn instr_0F00_4_reg(r: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_5_mem(addr: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("verw #ud");
trigger_ud();
return;
@ -187,7 +187,7 @@ pub unsafe fn instr_0F00_5_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr_0F00_5_reg(r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("verw #ud");
trigger_ud();
return;
@ -200,12 +200,7 @@ pub unsafe fn instr_0F01_0_reg(r: i32) { trigger_ud(); }
pub unsafe fn instr_0F01_0_mem(addr: i32) {
// sgdt
return_on_pagefault!(writable_or_pagefault(addr, 6));
let mask = if 0 != is_osize_32() as i32 {
-1
}
else {
0xFFFFFF
};
let mask = if is_osize_32() { -1 } else { 0xFFFFFF };
safe_write16(addr, *gdtr_size).unwrap();
safe_write32(addr + 2, *gdtr_offset & mask).unwrap();
}
@ -215,12 +210,7 @@ pub unsafe fn instr_0F01_1_reg(r: i32) { trigger_ud(); }
pub unsafe fn instr_0F01_1_mem(addr: i32) {
// sidt
return_on_pagefault!(writable_or_pagefault(addr, 6));
let mask = if 0 != is_osize_32() as i32 {
-1
}
else {
0xFFFFFF
};
let mask = if is_osize_32() { -1 } else { 0xFFFFFF };
safe_write16(addr, *idtr_size).unwrap();
safe_write32(addr + 2, *idtr_offset & mask).unwrap();
}
@ -236,12 +226,7 @@ pub unsafe fn instr_0F01_2_mem(addr: i32) {
else {
let size = return_on_pagefault!(safe_read16(addr));
let offset = return_on_pagefault!(safe_read32s(addr + 2));
let mask = if 0 != is_osize_32() as i32 {
-1
}
else {
0xFFFFFF
};
let mask = if is_osize_32() { -1 } else { 0xFFFFFF };
*gdtr_size = size;
*gdtr_offset = offset & mask;
return;
@ -259,12 +244,7 @@ pub unsafe fn instr_0F01_3_mem(addr: i32) {
else {
let size = return_on_pagefault!(safe_read16(addr));
let offset = return_on_pagefault!(safe_read32s(addr + 2));
let mask = if 0 != is_osize_32() as i32 {
-1
}
else {
0xFFFFFF
};
let mask = if is_osize_32() { -1 } else { 0xFFFFFF };
*idtr_size = size;
*idtr_offset = offset & mask;
return;
@ -326,7 +306,7 @@ pub unsafe fn instr_0F01_7_mem(addr: i32) {
}
#[no_mangle]
pub unsafe fn instr16_0F02_mem(addr: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lar #ud");
trigger_ud();
return;
@ -336,7 +316,7 @@ pub unsafe fn instr16_0F02_mem(addr: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr16_0F02_reg(r1: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lar #ud");
trigger_ud();
return;
@ -346,7 +326,7 @@ pub unsafe fn instr16_0F02_reg(r1: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr32_0F02_mem(addr: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lar #ud");
trigger_ud();
return;
@ -356,7 +336,7 @@ pub unsafe fn instr32_0F02_mem(addr: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr32_0F02_reg(r1: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lar #ud");
trigger_ud();
return;
@ -366,7 +346,7 @@ pub unsafe fn instr32_0F02_reg(r1: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr16_0F03_mem(addr: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lsl #ud");
trigger_ud();
return;
@ -376,7 +356,7 @@ pub unsafe fn instr16_0F03_mem(addr: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr16_0F03_reg(r1: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lsl #ud");
trigger_ud();
return;
@ -386,7 +366,7 @@ pub unsafe fn instr16_0F03_reg(r1: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr32_0F03_mem(addr: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lsl #ud");
trigger_ud();
return;
@ -396,7 +376,7 @@ pub unsafe fn instr32_0F03_mem(addr: i32, r: i32) {
}
#[no_mangle]
pub unsafe fn instr32_0F03_reg(r1: i32, r: i32) {
if !*protected_mode || 0 != vm86_mode() as i32 {
if !*protected_mode || vm86_mode() {
dbg_log!("lsl #ud");
trigger_ud();
return;
@ -6246,29 +6226,25 @@ pub unsafe fn instr_0FC2(source: reg128, r: i32, imm8: i32) {
let destination = read_xmm128s(r);
let result = reg128 {
i32_0: [
if 0 != sse_comparison(imm8, destination.f32_0[0] as f64, source.f32_0[0] as f64) as i32
{
if sse_comparison(imm8, destination.f32_0[0] as f64, source.f32_0[0] as f64) {
-1
}
else {
0
},
if 0 != sse_comparison(imm8, destination.f32_0[1] as f64, source.f32_0[1] as f64) as i32
{
if sse_comparison(imm8, destination.f32_0[1] as f64, source.f32_0[1] as f64) {
-1
}
else {
0
},
if 0 != sse_comparison(imm8, destination.f32_0[2] as f64, source.f32_0[2] as f64) as i32
{
if sse_comparison(imm8, destination.f32_0[2] as f64, source.f32_0[2] as f64) {
-1
}
else {
0
},
if 0 != sse_comparison(imm8, destination.f32_0[3] as f64, source.f32_0[3] as f64) as i32
{
if sse_comparison(imm8, destination.f32_0[3] as f64, source.f32_0[3] as f64) {
-1
}
else {
@ -6290,13 +6266,13 @@ pub unsafe fn instr_660FC2(source: reg128, r: i32, imm8: i32) {
let destination = read_xmm128s(r);
let result = reg128 {
i64_0: [
(if 0 != sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) as i32 {
(if sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) {
-1
}
else {
0
}) as i64,
(if 0 != sse_comparison(imm8, destination.f64_0[1], source.f64_0[1]) as i32 {
(if sse_comparison(imm8, destination.f64_0[1], source.f64_0[1]) {
-1
}
else {
@ -6320,7 +6296,7 @@ pub unsafe fn instr_F20FC2(source: reg64, r: i32, imm8: i32) {
let destination = read_xmm64s(r);
let result = reg64 {
i64_0: [
(if 0 != sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) as i32 {
(if sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) {
-1
}
else {
@ -6342,7 +6318,7 @@ pub unsafe fn instr_F20FC2_mem(addr: i32, r: i32, imm: i32) {
pub unsafe fn instr_F30FC2(source: f32, r: i32, imm8: i32) {
// cmpss xmm, xmm/m32
let destination = read_xmm_f32(r);
let result = if 0 != sse_comparison(imm8, destination as f64, source as f64) as i32 {
let result = if sse_comparison(imm8, destination as f64, source as f64) {
-1
}
else {

16
src/rust/cpu2/misc_instr.rs
View file

@ -74,11 +74,11 @@ pub unsafe fn test_s() -> bool { return getsf(); }
#[no_mangle]
pub unsafe fn test_p() -> bool { return getpf(); }
#[no_mangle]
pub unsafe fn test_be() -> bool { return 0 != getcf() as i32 || 0 != getzf() as i32; }
pub unsafe fn test_be() -> bool { return getcf() || getzf(); }
#[no_mangle]
pub unsafe fn test_l() -> bool { return getsf() as i32 != getof() as i32; }
pub unsafe fn test_l() -> bool { return getsf() != getof(); }
#[no_mangle]
pub unsafe fn test_le() -> bool { return 0 != getzf() as i32 || getsf() as i32 != getof() as i32; }
pub unsafe fn test_le() -> bool { return getzf() || getsf() != getof(); }
#[no_mangle]
pub unsafe fn test_no() -> bool { return !test_o(); }
#[no_mangle]
@ -114,7 +114,7 @@ pub unsafe fn jmpcc32(condition: bool, imm32: i32) {
};
}
#[no_mangle]
pub unsafe fn loope16(imm8s: i32) { jmpcc16(0 != decr_ecx_asize() && 0 != getzf() as i32, imm8s); }
pub unsafe fn loope16(imm8s: i32) { jmpcc16(0 != decr_ecx_asize() && getzf(), imm8s); }
#[no_mangle]
pub unsafe fn loopne16(imm8s: i32) { jmpcc16(0 != decr_ecx_asize() && !getzf(), imm8s); }
#[no_mangle]
@ -122,7 +122,7 @@ pub unsafe fn loop16(imm8s: i32) { jmpcc16(0 != decr_ecx_asize(), imm8s); }
#[no_mangle]
pub unsafe fn jcxz16(imm8s: i32) { jmpcc16(get_reg_asize(ECX) == 0, imm8s); }
#[no_mangle]
pub unsafe fn loope32(imm8s: i32) { jmpcc32(0 != decr_ecx_asize() && 0 != getzf() as i32, imm8s); }
pub unsafe fn loope32(imm8s: i32) { jmpcc32(0 != decr_ecx_asize() && getzf(), imm8s); }
#[no_mangle]
pub unsafe fn loopne32(imm8s: i32) { jmpcc32(0 != decr_ecx_asize() && !getzf(), imm8s); }
#[no_mangle]
@ -294,12 +294,10 @@ pub unsafe fn pusha32() {
push32(*reg32.offset(EDI as isize)).unwrap();
}
#[no_mangle]
pub unsafe fn setcc_reg(condition: bool, r: i32) {
write_reg8(r, if 0 != condition as i32 { 1 } else { 0 });
}
pub unsafe fn setcc_reg(condition: bool, r: i32) { write_reg8(r, condition as i32); }
#[no_mangle]
pub unsafe fn setcc_mem(condition: bool, addr: i32) {
return_on_pagefault!(safe_write8(addr, if 0 != condition as i32 { 1 } else { 0 }));
return_on_pagefault!(safe_write8(addr, condition as i32));
}
#[no_mangle]
pub unsafe fn fxsave(addr: i32) {