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sse: Expand sse3 instruction

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This commit is contained in:
Fabian 2018-08-28 12:31:21 -05:00
parent cc507db69b
commit 8dc066f73d
2 changed files with 5 additions and 2 deletions
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2
gen/x86_table.js
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@ -533,7 +533,7 @@ const encodings = [
{ sse: 1, opcode: 0x660F15, e: 1 },
{ sse: 1, opcode: 0x0F16, e: 1 },
{ sse: 1, opcode: 0x660F16, reg_ud: 1, e: 1 },
{ sse: 1, opcode: 0xF30F16, skip: 1, }, // sse3
{ sse: 1, opcode: 0xF30F16, skip: 1, e: 1 }, // sse3
{ sse: 1, opcode: 0x0F17, reg_ud: 1, e: 1 },
{ sse: 1, opcode: 0x660F17, reg_ud: 1, e: 1 },

5
src/rust/cpu2/instructions_0f.rs
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@ -5688,7 +5688,10 @@ pub unsafe fn instr_0FFF() -> () {
trigger_ud();
}
#[no_mangle]
pub unsafe fn instr_F30F16() -> () { unimplemented_sse(); }
pub unsafe fn instr_F30F16_reg(mut r1: i32, mut r2: i32) -> () { unimplemented_sse(); }
#[no_mangle]
pub unsafe fn instr_F30F16_mem(mut addr: i32, mut r: i32) -> () { unimplemented_sse(); }
#[no_mangle]
pub unsafe fn instr_0F19_reg(mut r1: i32, mut r2: i32) -> () {}
#[no_mangle]