diff --git a/src/browser/starter.js b/src/browser/starter.js index 58426348..72eafe68 100644 --- a/src/browser/starter.js +++ b/src/browser/starter.js @@ -134,8 +134,6 @@ function V86Starter(options) cpu.mmap_write128(addr, value0, value1, value2, value3); }, - "arpl": function() { return cpu.arpl.apply(cpu, arguments); }, - "lar": function() { return cpu.lar.apply(cpu, arguments); }, "lsl": function() { return cpu.lsl.apply(cpu, arguments); }, "verw": function() { return cpu.verw.apply(cpu, arguments); }, diff --git a/src/cpu.js b/src/cpu.js index df3c7ce0..22d254af 100644 --- a/src/cpu.js +++ b/src/cpu.js @@ -2346,22 +2346,6 @@ CPU.prototype.load_ldt = function(selector) //dbg_log("ldt at " + h(info.base >>> 0) + "; (" + info.effective_limit + " bytes)", LOG_CPU); }; -CPU.prototype.arpl = function(seg, r16) -{ - this.flags_changed[0] &= ~flag_zero; - - if((seg & 3) < (r16 & 3)) - { - this.flags[0] |= flag_zero; - return seg & ~3 | r16 & 3; - } - else - { - this.flags[0] &= ~flag_zero; - return seg; - } -}; - CPU.prototype.lar = function(selector, original) { if(CPU_LOG_VERBOSE) diff --git a/src/rust/cpu2/instructions.rs b/src/rust/cpu2/instructions.rs index a539a38e..3d5cbbca 100644 --- a/src/rust/cpu2/instructions.rs +++ b/src/rust/cpu2/instructions.rs @@ -1,8 +1,6 @@ #![allow(non_snake_case, unused_variables)] extern "C" { - #[no_mangle] - fn arpl(seg: i32, r: i32) -> i32; #[no_mangle] fn hlt_op(); } @@ -560,6 +558,20 @@ pub unsafe fn instr_62_mem(addr: i32, r: i32) { dbg_log!("Unimplemented BOUND instruction"); dbg_assert!(false); } + +pub unsafe fn arpl(seg: i32, r16: i32) -> i32 { + *flags_changed &= !FLAG_ZERO; + + if (seg & 3) < (r16 & 3) { + *flags |= FLAG_ZERO; + seg & !3 | r16 & 3 + } + else { + *flags &= !FLAG_ZERO; + seg + } +} + #[no_mangle] pub unsafe fn instr_63_mem(addr: i32, r: i32) { if !*protected_mode || vm86_mode() {