Add debug panel (#108)
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a0258079a0
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9e4b2c5ace
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@ -61,6 +61,11 @@
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<td><input type="file" id="hd_image"><br></td>
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</tr>
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<tr>
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<td>Multiboot kernel image</td>
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<td><input type="file" id="multiboot_image"><br></td>
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</tr>
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<tr>
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<td colspan="2"><hr></td>
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</tr>
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@ -233,6 +238,9 @@
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</label>
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</div>
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<div id="debug_panel" style="display: none">
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</div>
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<br style="clear:both"><br>
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<textarea readonly id="log" style="display:none"></textarea>
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@ -1264,9 +1264,20 @@
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}
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};
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var cpu = emulator.v86.cpu;
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$("debug_panel").style.display = "block";
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setInterval(function()
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{
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$("debug_panel").textContent =
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cpu.debug.get_regs_short().join("\n") + "\n"
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+ cpu.debug.get_state();
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}, 1000);
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// helps debugging
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window.emulator = emulator;
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window.cpu = emulator.v86.cpu;
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window.cpu = cpu;
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window.dump_file = dump_file;
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}
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function onpopstate(e)
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23
src/cpu.js
23
src/cpu.js
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@ -1427,8 +1427,9 @@ CPU.prototype.get_real_eip = function()
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CPU.prototype.call_interrupt_vector = function(interrupt_nr, is_software_int, error_code)
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{
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//dbg_log("int " + h(interrupt_nr, 2) + " (" + (is_software_int ? "soft" : "hard") + "ware)", LOG_CPU);
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CPU_LOG_VERBOSE && this.debug.dump_state("int " + h(interrupt_nr) + " start");
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//this.debug.dump_regs_short();
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CPU_LOG_VERBOSE && this.debug.dump_state("int " + h(interrupt_nr) + " start" +
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" (" + (is_software_int ? "soft" : "hard") + "ware)");
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CPU_LOG_VERBOSE && this.debug.dump_regs();
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this.debug.debug_interrupt(interrupt_nr);
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@ -1546,7 +1547,7 @@ CPU.prototype.call_interrupt_vector = function(interrupt_nr, is_software_int, er
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// interrupt from vm86 mode
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//dbg_log("Inter privilege interrupt gate=" + h(selector, 4) + ":" + h(base >>> 0, 8) + " trap=" + is_trap + " 16bit=" + is_16, LOG_CPU);
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//this.debug.dump_regs_short();
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//this.debug.dump_regs();
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var tss_stack_addr = this.get_tss_stack_addr(info.dpl);
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var new_esp = this.read32s(tss_stack_addr);
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@ -1583,7 +1584,7 @@ CPU.prototype.call_interrupt_vector = function(interrupt_nr, is_software_int, er
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if(old_flags & flag_vm)
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{
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//dbg_log("return from vm86 mode");
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//this.debug.dump_regs_short();
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//this.debug.dump_regs();
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dbg_assert(info.dpl === 0, "switch to non-0 dpl from vm86 mode");
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}
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@ -1639,7 +1640,7 @@ CPU.prototype.call_interrupt_vector = function(interrupt_nr, is_software_int, er
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//dbg_log("Intra privilege interrupt gate=" + h(selector, 4) + ":" + h(base >>> 0, 8) +
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// " trap=" + is_trap + " 16bit=" + is_16 +
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// " cpl=" + this.cpl + " dpl=" + info.dpl + " conforming=" + +info.dc_bit, LOG_CPU);
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//this.debug.dump_regs_short();
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//this.debug.dump_regs();
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if(this.flags & flag_vm)
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{
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@ -1692,7 +1693,6 @@ CPU.prototype.call_interrupt_vector = function(interrupt_nr, is_software_int, er
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this.switch_seg(reg_es, 0);
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}
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this.sreg[reg_cs] = selector & ~3 | this.cpl;
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dbg_assert((this.sreg[reg_cs] & 3) === this.cpl);
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@ -1755,7 +1755,7 @@ CPU.prototype.iret = function(is_16)
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{
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//dbg_log("iret is_16=" + is_16, LOG_CPU);
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CPU_LOG_VERBOSE && this.debug.dump_state("iret" + (is_16 ? "16" : "32") + " start");
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//this.debug.dump_regs_short();
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//this.debug.dump_regs();
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if(this.vm86_mode() && this.getiopl() < 3)
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{
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@ -1862,7 +1862,7 @@ CPU.prototype.iret = function(is_16)
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//dbg_log("iret32 to:", LOG_CPU);
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CPU_LOG_VERBOSE && this.debug.dump_state("iret end");
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//this.debug.dump_regs_short();
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//this.debug.dump_regs();
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return;
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}
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@ -2164,6 +2164,7 @@ CPU.prototype.far_return = function(eip, selector, stack_adjust)
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this.segment_offsets[reg_cs] = info.base;
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this.sreg[reg_cs] = selector;
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dbg_assert((selector & 3) === this.cpl);
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this.instruction_pointer = this.get_seg(reg_cs) + eip | 0;
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@ -2687,7 +2688,7 @@ CPU.prototype.raise_exception = function(interrupt_nr)
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// // show interesting exceptions
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// dbg_log("Exception " + h(interrupt_nr) + " at " + h(this.previous_ip >>> 0, 8) + " (cs=" + h(this.sreg[reg_cs], 4) + ")", LOG_CPU);
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// dbg_trace(LOG_CPU);
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// this.debug.dump_regs_short();
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// this.debug.dump_regs();
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// this.debug.dump_state();
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//}
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@ -2703,7 +2704,7 @@ CPU.prototype.raise_exception_with_code = function(interrupt_nr, error_code)
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//{
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// dbg_log("Exception " + h(interrupt_nr) + " err=" + h(error_code) + " at " + h(this.previous_ip >>> 0, 8) + " (cs=" + h(this.sreg[reg_cs], 4) + ")", LOG_CPU);
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// dbg_trace(LOG_CPU);
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// this.debug.dump_regs_short();
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// this.debug.dump_regs();
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//}
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this.call_interrupt_vector(interrupt_nr, false, error_code);
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@ -3487,7 +3488,7 @@ CPU.prototype.switch_seg = function(reg, selector)
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) {
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dbg_log("#GP for loading invalid in seg " + reg + " sel=" + h(selector, 4), LOG_CPU);
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this.debug.dump_state();
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this.debug.dump_regs_short();
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this.debug.dump_regs();
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dbg_trace(LOG_CPU);
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this.trigger_gp(selector & ~3);
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}
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116
src/debug.js
116
src/debug.js
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@ -67,10 +67,11 @@ CPU.prototype.debug_init = function()
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}
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};
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debug.dump_regs = dump_regs;
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debug.get_regs_short = get_regs_short;
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debug.dump_regs = dump_regs_short;
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debug.dump_instructions = dump_instructions;
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debug.get_instructions = get_instructions;
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debug.dump_regs_short = dump_regs_short;
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debug.get_state = get_state;
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debug.dump_state = dump_state;
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debug.dump_stack = dump_stack;
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@ -130,7 +131,6 @@ CPU.prototype.debug_init = function()
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cpu.running = false;
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var a = parseInt(prompt("input hex", ""), 16);
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if(a) while(cpu.instruction_pointer != a) step();
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dump_regs();
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}
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// http://ref.x86asm.net/x86reference.xml
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@ -213,12 +213,11 @@ CPU.prototype.debug_init = function()
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}
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}
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function dump_state(where)
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function get_state(where)
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{
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if(!DEBUG) return;
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var mode = cpu.protected_mode ? "prot" : "real";
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var vm = (cpu.flags & flag_vm) ? 1 : 0;
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var mode = cpu.protected_mode ? vm ? "vm86" : "prot" : "real";
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var flags = cpu.get_eflags();
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var iopl = cpu.getiopl();
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var cpl = cpu.cpl;
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var cs_eip = h(cpu.sreg[reg_cs], 4) + ":" + h(cpu.get_real_eip() >>> 0, 8);
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@ -226,19 +225,52 @@ CPU.prototype.debug_init = function()
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var op_size = cpu.is_32 ? "32" : "16";
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var if_ = (cpu.flags & flag_interrupt) ? 1 : 0;
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dbg_log("mode=" + mode + "/" + op_size + " paging=" + (+cpu.paging) + " vm=" + vm +
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var flag_names = {
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[flag_carry]: "c",
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[flag_parity]: "p",
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[flag_adjust]: "a",
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[flag_zero]: "z",
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[flag_sign]: "s",
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[flag_trap]: "t",
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[flag_interrupt]: "i",
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[flag_direction]: "d",
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[flag_overflow]: "o",
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};
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var flag_string = "";
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for(var i = 0; i < 16; i++)
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{
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if(flag_names[1 << i])
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{
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if(flags & 1 << i)
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{
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flag_string += flag_names[1 << i];
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}
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else
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{
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flag_string += " ";
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}
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}
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}
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return ("mode=" + mode + "/" + op_size + " paging=" + (+cpu.paging) +
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" iopl=" + iopl + " cpl=" + cpl + " if=" + if_ + " cs:eip=" + cs_eip +
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" cs_off=" + h(cpu.get_seg(reg_cs) >>> 0, 8) +
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" flgs=" + h(cpu.get_eflags() >>> 0) +
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" flgs=" + h(cpu.get_eflags() >>> 0, 6) + " (" + flag_string + ")" +
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" ss:esp=" + ss_esp +
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" ssize=" + (+cpu.stack_size_32) +
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(where ? " in " + where : ""), LOG_CPU);
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(where ? " in " + where : ""));
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}
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function dump_regs_short()
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function dump_state(where)
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{
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if(!DEBUG) return;
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dbg_log(get_state(where), LOG_CPU);
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}
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function get_regs_short()
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{
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var
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r32 = { "eax": reg_eax, "ecx": reg_ecx, "edx": reg_edx, "ebx": reg_ebx,
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"esp": reg_esp, "ebp": reg_ebp, "esi": reg_esi, "edi": reg_edi },
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@ -255,67 +287,23 @@ CPU.prototype.debug_init = function()
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line2 += r32_names[i+4] + "=" + h(cpu.reg32[r32[r32_names[i+4]]], 8) + " ";
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}
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line1 += " eip=" + h(cpu.get_real_eip() >>> 0, 8);
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line2 += " flg=" + h(cpu.get_eflags(), 8);
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//line1 += " eip=" + h(cpu.get_real_eip() >>> 0, 8);
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//line2 += " flg=" + h(cpu.get_eflags(), 8);
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line1 += " ds=" + h(cpu.sreg[reg_ds], 4) + " es=" + h(cpu.sreg[reg_es], 4) + " fs=" + h(cpu.sreg[reg_fs], 4);
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line2 += " gs=" + h(cpu.sreg[reg_gs], 4) + " cs=" + h(cpu.sreg[reg_cs], 4) + " ss=" + h(cpu.sreg[reg_ss], 4);
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line1 += " ds=" + h(cpu.sreg[reg_ds], 4) + " es=" + h(cpu.sreg[reg_es], 4) + " fs=" + h(cpu.sreg[reg_fs], 4);
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line2 += " gs=" + h(cpu.sreg[reg_gs], 4) + " cs=" + h(cpu.sreg[reg_cs], 4) + " ss=" + h(cpu.sreg[reg_ss], 4);
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dbg_log(line1, LOG_CPU);
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dbg_log(line2, LOG_CPU);
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return [line1, line2];
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}
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function dump_regs()
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function dump_regs_short()
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{
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if(!DEBUG) return;
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var
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r32 = { "eax": reg_eax, "ecx": reg_ecx, "edx": reg_edx, "ebx": reg_ebx,
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"esp": reg_esp, "ebp": reg_ebp, "esi": reg_esi, "edi": reg_edi },
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s = { "cs": reg_cs, "ds": reg_ds, "es": reg_es,
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"fs": reg_fs, "gs": reg_gs, "ss": reg_ss },
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out;
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dbg_log("----- DUMP (ip = " + h(cpu.instruction_pointer >>> 0) + ") ----------")
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dbg_log("protected mode: " + cpu.protected_mode);
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for(var i in r32)
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{
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dbg_log(i + " = " + h(cpu.reg32[r32[i]], 8));
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}
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dbg_log("eip = " + h(cpu.get_real_eip() >>> 0, 8));
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for(i in s)
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{
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dbg_log(i + " = " + h(cpu.sreg[s[i]], 4));
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}
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out = "";
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var flg = { "cf": cpu.getcf, "pf": cpu.getpf, "zf": cpu.getzf, "sf": cpu.getsf,
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"of": cpu.getof, "df": flag_direction, "if": flag_interrupt };
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for(var i in flg)
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{
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if(+flg[i])
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{
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out += i + "=" + Number(!!(cpu.flags & flg[i])) + " | ";
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}
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else
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{
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out += i + "=" + Number(!!flg[i]()) + " | ";
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}
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}
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out += "iopl=" + cpu.getiopl();
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dbg_log(out);
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//dbg_log("last operation: " + h(last_op1 | 0) + ", " + h(last_op2 | 0) + " = " +
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//h(last_result | 0) + " (" + last_op_size + " bit)")
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var lines = get_regs_short();
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dbg_log(lines[0], LOG_CPU);
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dbg_log(lines[1], LOG_CPU);
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}
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function get_instructions()
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6
v86.css
6
v86.css
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@ -1,4 +1,4 @@
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#log, #runtime_infos, #serial, #filesystem_panel {
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#log, #runtime_infos, #serial, #filesystem_panel, #debug_panel {
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font-family: DejaVu Sans Mono, monospace;
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font-size: 13px;
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border: 1px solid #333;
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@ -17,6 +17,10 @@
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height: 100px;
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width: 550px;
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}
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#debug_panel {
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white-space: pre;
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float: left;
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}
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#serial {
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margin: 0px;
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}
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