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jit {F2,F3}0FC2 (cmpsd, cmpss)

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Fabian 2021-04-04 23:36:54 -05:00
parent 2a22980cf7
commit bbeca7a13d
3 changed files with 36 additions and 9 deletions
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4
gen/x86_table.js
View file

@ -815,8 +815,8 @@ const encodings = [
{ sse: 1, opcode: 0x0FC2, e: 1, imm8: 1, custom: 1 },
{ sse: 1, opcode: 0x660FC2, e: 1, imm8: 1, custom: 1 },
{ sse: 1, opcode: 0xF20FC2, e: 1, imm8: 1 },
{ sse: 1, opcode: 0xF30FC2, e: 1, imm8: 1 },
{ sse: 1, opcode: 0xF20FC2, e: 1, imm8: 1, custom: 1 },
{ sse: 1, opcode: 0xF30FC2, e: 1, imm8: 1, custom: 1 },
{ opcode: 0x0FC3, e: 1, custom: 1, reg_ud: 1, }, // movnti: Uses normal registers, hence not marked as sse

13
src/rust/cpu/instructions_0f.rs
View file

@ -3748,6 +3748,7 @@ pub unsafe fn instr_660FC2_reg(r1: i32, r2: i32, imm: i32) {
pub unsafe fn instr_660FC2_mem(addr: i32, r: i32, imm: i32) {
instr_660FC2(return_on_pagefault!(safe_read128s(addr)), r, imm);
}
#[no_mangle]
pub unsafe fn instr_F20FC2(source: u64, r: i32, imm8: i32) {
// cmpsd xmm, xmm/m64
let destination = read_xmm64s(r);
@ -3761,27 +3762,25 @@ pub unsafe fn instr_F20FC2(source: u64, r: i32, imm8: i32) {
},
);
}
#[no_mangle]
pub unsafe fn instr_F20FC2_reg(r1: i32, r2: i32, imm: i32) {
instr_F20FC2(read_xmm64s(r1), r2, imm);
}
#[no_mangle]
pub unsafe fn instr_F20FC2_mem(addr: i32, r: i32, imm: i32) {
instr_F20FC2(return_on_pagefault!(safe_read64s(addr)), r, imm);
}
pub unsafe fn instr_F30FC2(source: f32, r: i32, imm8: i32) {
#[no_mangle]
pub unsafe fn instr_F30FC2(source: i32, r: i32, imm8: i32) {
// cmpss xmm, xmm/m32
let destination = read_xmm_f32(r);
let source: f32 = std::mem::transmute(source);
let result = if sse_comparison(imm8, destination as f64, source as f64) { -1 } else { 0 };
write_xmm32(r, result);
}
#[no_mangle]
pub unsafe fn instr_F30FC2_reg(r1: i32, r2: i32, imm: i32) {
instr_F30FC2(read_xmm_f32(r1), r2, imm);
instr_F30FC2(read_xmm64s(r1) as i32, r2, imm);
}
#[no_mangle]
pub unsafe fn instr_F30FC2_mem(addr: i32, r: i32, imm: i32) {
instr_F30FC2(return_on_pagefault!(safe_read_f32(addr)), r, imm);
instr_F30FC2(return_on_pagefault!(safe_read32s(addr)), r, imm);
}
pub unsafe fn instr_0FC3_reg(_r1: i32, _r2: i32) { trigger_ud(); }

28
src/rust/jit_instructions.rs
View file

@ -4794,6 +4794,34 @@ pub fn instr_660FC2_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32,
ctx.builder.const_i32(imm8 as i32);
ctx.builder.call_fn3("instr_660FC2");
}
pub fn instr_F20FC2_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32, imm8: u32) {
ctx.builder
.const_i32(global_pointers::get_reg_xmm_offset(r1) as i32);
ctx.builder.load_aligned_i64(0);
ctx.builder.const_i32(r2 as i32);
ctx.builder.const_i32(imm8 as i32);
ctx.builder.call_fn3_i64_i32_i32("instr_F20FC2");
}
pub fn instr_F20FC2_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32, imm8: u32) {
codegen::gen_modrm_resolve_safe_read64(ctx, modrm_byte);
ctx.builder.const_i32(r as i32);
ctx.builder.const_i32(imm8 as i32);
ctx.builder.call_fn3_i64_i32_i32("instr_F20FC2");
}
pub fn instr_F30FC2_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32, imm8: u32) {
ctx.builder
.const_i32(global_pointers::get_reg_xmm_offset(r1) as i32);
ctx.builder.load_aligned_i32(0);
ctx.builder.const_i32(r2 as i32);
ctx.builder.const_i32(imm8 as i32);
ctx.builder.call_fn3("instr_F30FC2");
}
pub fn instr_F30FC2_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32, imm8: u32) {
codegen::gen_modrm_resolve_safe_read32(ctx, modrm_byte);
ctx.builder.const_i32(r as i32);
ctx.builder.const_i32(imm8 as i32);
ctx.builder.call_fn3("instr_F30FC2");
}
pub fn instr_0FC6_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32, imm8: u32) {
let dest = global_pointers::get_reg_xmm_offset(r1);