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Add sqrt{p,s}{d,s} instructions (#57)

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Fabian 2018-07-30 17:48:47 -05:00
parent 70ae4b720a
commit c10bbca85e
2 changed files with 42 additions and 2 deletions
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5
gen/x86_table.js
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@ -511,7 +511,10 @@ const encodings = [
{ sse: 1, opcode: 0x0F50, mem_ud: 1, e: 1 },
{ sse: 1, opcode: 0x660F50, mem_ud: 1, e: 1 },
{ sse: 1, opcode: 0x0F51, skip: 1 },
{ sse: 1, opcode: 0x0F51, e: 1 },
{ sse: 1, opcode: 0x660F51, e: 1 },
{ sse: 1, opcode: 0xF20F51, e: 1 },
{ sse: 1, opcode: 0xF30F51, e: 1 },
{ sse: 1, opcode: 0x0F52, skip: 1 },
// reciprocal: approximation of 1/x. Skipped because our approximation doesn't match intel's

39
src/native/instructions_0f.c
View file

@ -1046,7 +1046,44 @@ void instr_660F50_reg(int32_t r1, int32_t r2) {
}
void instr_660F50_mem(int32_t addr, int32_t r1) { trigger_ud(); }
void instr_0F51() { unimplemented_sse(); }
void instr_0F51(union reg128 source, int32_t r) {
// sqrtps xmm, xmm/mem128
union reg128 result = {
.f32 = {
sqrtf(source.f32[0]),
sqrtf(source.f32[1]),
sqrtf(source.f32[2]),
sqrtf(source.f32[3]),
}
};
write_xmm_reg128(r, result);
}
DEFINE_SSE_SPLIT(instr_0F51, safe_read128s, read_xmm128s)
void instr_660F51(union reg128 source, int32_t r) {
// sqrtpd xmm, xmm/mem128
union reg128 result = {
.f64 = {
sqrt(source.f64[0]),
sqrt(source.f64[1]),
}
};
write_xmm_reg128(r, result);
}
DEFINE_SSE_SPLIT(instr_660F51, safe_read128s, read_xmm128s)
void instr_F20F51(union reg64 source, int32_t r) {
// sqrtsd xmm, xmm/mem64
union reg64 result = {
.f64 = { sqrt(source.f64[0]), }
};
write_xmm64(r, result);
}
DEFINE_SSE_SPLIT(instr_F20F51, safe_read64s, read_xmm64s)
void instr_F30F51(float_t source, int32_t r) {
// sqrtss xmm, xmm/mem32
write_xmm_f32(r, sqrtf(source));
}
DEFINE_SSE_SPLIT(instr_F30F51, fpu_load_m32, read_xmm_f32)
void instr_0F52() { unimplemented_sse(); }
void instr_0F53(union reg128 source, int32_t r) {