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Add tests for fstenv/fldenv/fld [m80]

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Fabian 2020-12-31 19:14:29 -06:00
parent 48940e426a
commit cd909c4f02
3 changed files with 31 additions and 2 deletions
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4
gen/x86_table.js
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@ -285,7 +285,7 @@ const encodings = [
{ opcode: 0xD9, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, only_reg: 1 }, // fldenv
{ opcode: 0xD9, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, skip: 1, }, // fstenv (mem), fprem (reg)
{ opcode: 0xD9, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, only_mem: 1, }, // fprem
@ -304,7 +304,7 @@ const encodings = [
{ opcode: 0xDB, e: 1, fixed_g: 2, custom: 2, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDB, e: 1, fixed_g: 3, custom: 2, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDB, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDB, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, only_reg: 1, }, // XXX: skipped: Seems to page fault or so
{ opcode: 0xDB, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDB, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDB, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },

13
tests/nasm/fpu_m80.asm Normal file
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@ -0,0 +1,13 @@
global _start
section .data
align 16
%include "header.inc"
push 1
push 0
push 0
fld tword [esp-8]
%include "footer.inc"

16
tests/nasm/fstenv.asm Normal file
View file

@ -0,0 +1,16 @@
global _start
section .data
align 16
%include "header.inc"
fstenv [esp]
; zero undefined fields
mov word [esp + 0 + 2], 0
mov word [esp + 4 + 2], 0
mov word [esp + 8 + 2], 0
mov word [esp + 24 + 2], 0
%include "footer.inc"