194 lines
4.4 KiB
C
194 lines
4.4 KiB
C
#include "libcflat.h"
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#include "smp.h"
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#include "atomic.h"
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#include "processor.h"
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#include "hyperv.h"
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#include "vm.h"
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#define MAX_CPU 4
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#define TICKS_PER_SEC (1000000000 / 100)
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struct hv_reference_tsc_page *hv_clock;
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/*
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* Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction,
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* yielding a 64-bit result.
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*/
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static inline u64 scale_delta(u64 delta, u64 mul_frac)
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{
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u64 product, unused;
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__asm__ (
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"mulq %3"
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: "=d" (product), "=a" (unused) : "1" (delta), "rm" ((u64)mul_frac) );
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return product;
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}
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static u64 hvclock_tsc_to_ticks(struct hv_reference_tsc_page *shadow, uint64_t tsc)
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{
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u64 delta = tsc;
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return scale_delta(delta, shadow->tsc_scale) + shadow->tsc_offset;
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}
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/*
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* Reads a consistent set of time-base values from hypervisor,
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* into a shadow data area.
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*/
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static void hvclock_get_time_values(struct hv_reference_tsc_page *shadow,
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struct hv_reference_tsc_page *page)
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{
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int seq;
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do {
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seq = page->tsc_sequence;
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rmb(); /* fetch version before data */
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*shadow = *page;
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rmb(); /* test version after fetching data */
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} while (shadow->tsc_sequence != seq);
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}
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uint64_t hv_clock_read(void)
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{
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struct hv_reference_tsc_page shadow;
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hvclock_get_time_values(&shadow, hv_clock);
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return hvclock_tsc_to_ticks(&shadow, rdtsc());
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}
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bool ok[MAX_CPU];
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uint64_t loops[MAX_CPU];
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#define iabs(x) ((x) < 0 ? -(x) : (x))
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static void hv_clock_test(void *data)
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{
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int i = smp_id();
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uint64_t t = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
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uint64_t end = t + 3 * TICKS_PER_SEC;
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uint64_t msr_sample = t + TICKS_PER_SEC;
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int min_delta = 123456, max_delta = -123456;
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bool got_drift = false;
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bool got_warp = false;
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ok[i] = true;
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do {
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uint64_t now = hv_clock_read();
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int delta = rdmsr(HV_X64_MSR_TIME_REF_COUNT) - now;
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min_delta = delta < min_delta ? delta : min_delta;
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if (t < msr_sample) {
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max_delta = delta > max_delta ? delta: max_delta;
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} else if (delta < 0 || delta > max_delta * 3 / 2) {
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printf("suspecting drift on CPU %d? delta = %d, acceptable [0, %d)\n", smp_id(),
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delta, max_delta);
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ok[i] = false;
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got_drift = true;
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max_delta *= 2;
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}
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if (now < t && !got_warp) {
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printf("warp on CPU %d!\n", smp_id());
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ok[i] = false;
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got_warp = true;
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break;
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}
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t = now;
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} while(t < end);
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if (!got_drift)
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printf("delta on CPU %d was %d...%d\n", smp_id(), min_delta, max_delta);
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barrier();
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}
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static void check_test(int ncpus)
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{
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int i;
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bool pass;
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on_cpus(hv_clock_test, NULL);
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pass = true;
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for (i = ncpus - 1; i >= 0; i--)
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pass &= ok[i];
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report("TSC reference precision test", pass);
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}
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static void hv_perf_test(void *data)
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{
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uint64_t t = hv_clock_read();
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uint64_t end = t + 1000000000 / 100;
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uint64_t local_loops = 0;
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do {
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t = hv_clock_read();
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local_loops++;
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} while(t < end);
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loops[smp_id()] = local_loops;
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}
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static void perf_test(int ncpus)
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{
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int i;
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uint64_t total_loops;
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on_cpus(hv_perf_test, NULL);
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total_loops = 0;
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for (i = ncpus - 1; i >= 0; i--)
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total_loops += loops[i];
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printf("iterations/sec: %" PRId64"\n", total_loops / ncpus);
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}
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int main(int ac, char **av)
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{
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int nerr = 0;
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int ncpus;
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struct hv_reference_tsc_page shadow;
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uint64_t tsc1, t1, tsc2, t2;
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uint64_t ref1, ref2;
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setup_vm();
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smp_init();
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ncpus = cpu_count();
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if (ncpus > MAX_CPU)
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report_abort("number cpus exceeds %d", MAX_CPU);
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hv_clock = alloc_page();
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wrmsr(HV_X64_MSR_REFERENCE_TSC, (u64)(uintptr_t)hv_clock | 1);
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report("MSR value after enabling",
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rdmsr(HV_X64_MSR_REFERENCE_TSC) == ((u64)(uintptr_t)hv_clock | 1));
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hvclock_get_time_values(&shadow, hv_clock);
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if (shadow.tsc_sequence == 0 || shadow.tsc_sequence == 0xFFFFFFFF) {
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printf("Reference TSC page not available\n");
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exit(1);
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}
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printf("scale: %" PRIx64" offset: %" PRId64"\n", shadow.tsc_scale, shadow.tsc_offset);
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ref1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
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tsc1 = rdtsc();
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t1 = hvclock_tsc_to_ticks(&shadow, tsc1);
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printf("refcnt %" PRId64", TSC %" PRIx64", TSC reference %" PRId64"\n",
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ref1, tsc1, t1);
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do
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ref2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
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while (ref2 < ref1 + 2 * TICKS_PER_SEC);
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tsc2 = rdtsc();
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t2 = hvclock_tsc_to_ticks(&shadow, tsc2);
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printf("refcnt %" PRId64" (delta %" PRId64"), TSC %" PRIx64", "
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"TSC reference %" PRId64" (delta %" PRId64")\n",
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ref2, ref2 - ref1, tsc2, t2, t2 - t1);
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check_test(ncpus);
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perf_test(ncpus);
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wrmsr(HV_X64_MSR_REFERENCE_TSC, 0LL);
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report("MSR value after disabling", rdmsr(HV_X64_MSR_REFERENCE_TSC) == 0);
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return nerr > 0 ? 1 : 0;
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}
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