634 lines
16 KiB
JavaScript
634 lines
16 KiB
JavaScript
"use strict";
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// See Intel's System Programming Guide
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/** @const */
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var APIC_LOG_VERBOSE = false;
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/** @const */
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var APIC_ADDRESS = 0xFEE00000;
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/** @const */
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var APIC_TIMER_MODE_MASK = 3 << 17;
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/** @const */
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var APIC_TIMER_MODE_ONE_SHOT = 0;
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/** @const */
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var APIC_TIMER_MODE_PERIODIC = 1 << 17;
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/** @const */
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var APIC_TIMER_MODE_TSC = 2 << 17;
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/** @const */
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var DELIVERY_MODES = [
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"Fixed (0)",
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"Lowest Prio (1)",
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"SMI (2)",
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"Reserved (3)",
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"NMI (4)",
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"INIT (5)",
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"Reserved (6)",
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"ExtINT (7)",
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];
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/** @const */
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var DESTINATION_MODES = ["physical", "logical"];
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/**
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* @constructor
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* @param {CPU} cpu
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*/
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function APIC(cpu)
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{
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/** @type {CPU} */
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this.cpu = cpu;
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this.apic_id = 0;
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this.timer_divider = 0;
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this.timer_divider_shift = 1;
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this.timer_initial_count = 0;
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this.timer_current_count = 0;
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this.next_tick = v86.microtick();
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this.lvt_timer = IOAPIC_CONFIG_MASKED;
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this.lvt_perf_counter = IOAPIC_CONFIG_MASKED;
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this.lvt_int0 = IOAPIC_CONFIG_MASKED;
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this.lvt_int1 = IOAPIC_CONFIG_MASKED;
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this.lvt_error = IOAPIC_CONFIG_MASKED;
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this.tpr = 0;
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this.icr0 = 0;
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this.icr1 = 0;
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this.irr = new Int32Array(8);
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this.isr = new Int32Array(8);
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this.tmr = new Int32Array(8);
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this.spurious_vector = 0xFE;
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this.destination_format = -1;
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this.local_destination = 0;
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this.error = 0;
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this.read_error = 0;
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cpu.io.mmap_register(APIC_ADDRESS, 0x100000,
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(addr) =>
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{
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dbg_log("Unsupported read8 from apic: " + h(addr >>> 0), LOG_APIC);
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var off = addr & 3;
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addr &= ~3;
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return this.read32(addr) >> (off * 8) & 0xFF;
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},
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(addr, value) =>
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{
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dbg_log("Unsupported write8 from apic: " + h(addr) + " <- " + h(value), LOG_APIC);
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dbg_trace();
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dbg_assert(false);
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},
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(addr) => this.read32(addr),
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(addr, value) => this.write32(addr, value)
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);
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}
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APIC.prototype.read32 = function(addr)
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{
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addr = addr - APIC_ADDRESS | 0;
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switch(addr)
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{
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case 0x20:
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dbg_log("APIC read id", LOG_APIC);
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return this.apic_id;
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case 0x30:
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// version
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dbg_log("APIC read version", LOG_APIC);
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return 0x50014;
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case 0x80:
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APIC_LOG_VERBOSE && dbg_log("APIC read tpr", LOG_APIC);
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return this.tpr;
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case 0xD0:
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dbg_log("Read local destination", LOG_APIC);
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return this.local_destination;
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case 0xE0:
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dbg_log("Read destination format", LOG_APIC);
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return this.destination_format;
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case 0xF0:
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return this.spurious_vector;
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case 0x100:
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case 0x110:
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case 0x120:
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case 0x130:
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case 0x140:
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case 0x150:
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case 0x160:
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case 0x170:
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var index = addr - 0x100 >> 4;
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dbg_log("Read isr " + index + ": " + h(this.isr[index] >>> 0, 8), LOG_APIC);
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return this.isr[index];
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case 0x180:
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case 0x190:
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case 0x1A0:
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case 0x1B0:
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case 0x1C0:
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case 0x1D0:
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case 0x1E0:
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case 0x1F0:
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var index = addr - 0x180 >> 4;
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dbg_log("Read tmr " + index + ": " + h(this.tmr[index] >>> 0, 8), LOG_APIC);
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return this.tmr[index];
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case 0x200:
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case 0x210:
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case 0x220:
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case 0x230:
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case 0x240:
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case 0x250:
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case 0x260:
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case 0x270:
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var index = addr - 0x200 >> 4;
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dbg_log("Read irr " + index + ": " + h(this.irr[index] >>> 0, 8), LOG_APIC);
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return this.irr[index];
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case 0x280:
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dbg_log("Read error: " + h(this.read_error >>> 0, 8), LOG_APIC);
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return this.read_error;
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case 0x300:
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APIC_LOG_VERBOSE && dbg_log("APIC read icr0", LOG_APIC);
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return this.icr0;
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case 0x310:
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dbg_log("APIC read icr1", LOG_APIC);
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return this.icr1;
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case 0x320:
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dbg_log("read timer lvt", LOG_APIC);
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return this.lvt_timer;
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case 0x340:
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dbg_log("read lvt perf counter", LOG_APIC);
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return this.lvt_perf_counter;
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case 0x350:
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dbg_log("read lvt int0", LOG_APIC);
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return this.lvt_int0;
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case 0x360:
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dbg_log("read lvt int1", LOG_APIC);
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return this.lvt_int1;
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case 0x370:
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dbg_log("read lvt error", LOG_APIC);
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return this.lvt_error;
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case 0x3E0:
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// divider
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dbg_log("read timer divider", LOG_APIC);
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return this.timer_divider;
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case 0x380:
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dbg_log("read timer initial count", LOG_APIC);
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return this.timer_initial_count;
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case 0x390:
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dbg_log("read timer current count: " + h(this.timer_current_count >>> 0, 8), LOG_APIC);
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return this.timer_current_count;
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default:
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dbg_log("APIC read " + h(addr), LOG_APIC);
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dbg_assert(false);
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return 0;
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}
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};
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APIC.prototype.write32 = function(addr, value)
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{
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addr = addr - APIC_ADDRESS | 0;
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switch(addr)
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{
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case 0x30:
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// version
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dbg_log("APIC write version: " + h(value >>> 0, 8) + ", ignored", LOG_APIC);
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break;
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case 0x80:
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APIC_LOG_VERBOSE && dbg_log("Set tpr: " + h(value & 0xFF, 2), LOG_APIC);
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this.tpr = value & 0xFF;
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this.check_vector();
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break;
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case 0xB0:
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var highest_isr = this.highest_isr();
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if(highest_isr !== -1)
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{
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APIC_LOG_VERBOSE && dbg_log("eoi: " + h(value >>> 0, 8) + " for vector " + h(highest_isr), LOG_APIC);
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this.register_clear_bit(this.isr, highest_isr);
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if(this.register_get_bit(this.tmr, highest_isr))
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{
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// Send eoi to all IO APICs
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this.cpu.devices.ioapic.remote_eoi(highest_isr);
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}
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this.check_vector();
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}
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else
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{
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dbg_log("Bad eoi: No isr set", LOG_APIC);
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}
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break;
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case 0xD0:
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dbg_log("Set local destination: " + h(value >>> 0, 8), LOG_APIC);
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this.local_destination = value & 0xFF000000;
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break;
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case 0xE0:
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dbg_log("Set destination format: " + h(value >>> 0, 8), LOG_APIC);
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this.destination_format = value | 0xFFFFFF;
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break;
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case 0xF0:
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dbg_log("Set spurious vector: " + h(value >>> 0, 8), LOG_APIC);
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this.spurious_vector = value;
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break;
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case 0x280:
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// updated readable error register with real error
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dbg_log("Write error: " + h(value >>> 0, 8), LOG_APIC);
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this.read_error = this.error;
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this.error = 0;
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break;
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case 0x300:
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var vector = value & 0xFF;
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var delivery_mode = value >> 8 & 7;
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var destination_mode = value >> 11 & 1;
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var is_level = value >> 15 & 1;
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var destination_shorthand = value >> 18 & 3;
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var destination = this.icr1 >>> 24;
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dbg_log("APIC write icr0: " + h(value, 8) + " vector=" + h(vector, 2) + " " +
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"destination_mode=" + DESTINATION_MODES[destination_mode] + " delivery_mode=" + DELIVERY_MODES[delivery_mode] + " " +
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"destination_shorthand=" + ["no", "self", "all with self", "all without self"][destination_shorthand], LOG_APIC);
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value &= ~(1 << 12);
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this.icr0 = value;
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if(destination_shorthand === 0)
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{
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// no shorthand
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this.route(vector, delivery_mode, is_level, destination, destination_mode);
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}
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else if(destination_shorthand === 1)
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{
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// self
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this.deliver(vector, IOAPIC_DELIVERY_FIXED, is_level);
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}
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else if(destination_shorthand === 2)
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{
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// all including self
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this.deliver(vector, delivery_mode, is_level);
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}
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else if(destination_shorthand === 3)
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{
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// all but self
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}
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else
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{
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dbg_assert(false);
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}
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break;
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case 0x310:
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dbg_log("APIC write icr1: " + h(value >>> 0, 8), LOG_APIC);
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this.icr1 = value;
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break;
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case 0x320:
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dbg_log("timer lvt: " + h(value >>> 0, 8), LOG_APIC);
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this.lvt_timer = value;
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break;
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case 0x340:
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dbg_log("lvt perf counter: " + h(value >>> 0, 8), LOG_APIC);
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this.lvt_perf_counter = value;
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break;
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case 0x350:
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dbg_log("lvt int0: " + h(value >>> 0, 8), LOG_APIC);
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this.lvt_int0 = value;
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break;
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case 0x360:
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dbg_log("lvt int1: " + h(value >>> 0, 8), LOG_APIC);
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this.lvt_int1 = value;
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break;
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case 0x370:
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dbg_log("lvt error: " + h(value >>> 0, 8), LOG_APIC);
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this.lvt_error = value;
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break;
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case 0x3E0:
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dbg_log("timer divider: " + h(value >>> 0, 8), LOG_APIC);
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this.timer_divider = value;
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var divide_shift = value & 0b11 | (value & 0b1000) >> 1;
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this.timer_divider_shift = divide_shift === 0b111 ? 0 : divide_shift + 1;
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break;
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case 0x380:
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dbg_log("timer initial: " + h(value >>> 0, 8), LOG_APIC);
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this.timer_initial_count = value >>> 0;
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this.timer_current_count = value >>> 0;
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this.next_tick = v86.microtick();
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this.timer_active = true;
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break;
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case 0x390:
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dbg_log("timer current: " + h(value >>> 0, 8), LOG_APIC);
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dbg_assert(false, "read-only register");
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break;
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default:
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dbg_log("APIC write32 " + h(addr) + " <- " + h(value >>> 0, 8), LOG_APIC);
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dbg_assert(false);
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}
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};
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APIC.prototype.timer = function(now)
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{
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if(this.timer_current_count === 0)
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{
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return;
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}
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//dbg_log(now + " " + this.next_tick, LOG_APIC);
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var steps = (now - this.next_tick) * APIC_TIMER_FREQ / (1 << this.timer_divider_shift) >>> 0;
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if(steps === 0)
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{
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return;
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}
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this.next_tick += steps / APIC_TIMER_FREQ * (1 << this.timer_divider_shift);
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this.timer_current_count -= steps;
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if(this.timer_current_count <= 0)
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{
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var mode = this.lvt_timer & APIC_TIMER_MODE_MASK;
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if(mode === APIC_TIMER_MODE_PERIODIC)
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{
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this.timer_current_count = this.timer_current_count % this.timer_initial_count;
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if(this.timer_current_count <= 0)
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{
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this.timer_current_count += this.timer_initial_count;
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}
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dbg_assert(this.timer_current_count !== 0);
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if((this.lvt_timer & IOAPIC_CONFIG_MASKED) === 0)
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{
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this.deliver(this.lvt_timer & 0xFF, IOAPIC_DELIVERY_FIXED, false);
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}
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}
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else if(mode === APIC_TIMER_MODE_ONE_SHOT)
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{
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this.timer_current_count = 0;
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dbg_log("APIC timer one shot end", LOG_APIC);
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if((this.lvt_timer & IOAPIC_CONFIG_MASKED) === 0)
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{
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this.deliver(this.lvt_timer & 0xFF, IOAPIC_DELIVERY_FIXED, false);
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}
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}
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}
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};
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APIC.prototype.route = function(vector, mode, is_level, destination, destination_mode)
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{
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// TODO
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this.deliver(vector, mode, is_level);
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};
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APIC.prototype.deliver = function(vector, mode, is_level)
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{
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APIC_LOG_VERBOSE && dbg_log("Deliver " + h(vector, 2) + " mode=" + mode + " level=" + is_level, LOG_APIC);
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if(mode === IOAPIC_DELIVERY_INIT)
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{
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// TODO
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return;
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}
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if(mode === IOAPIC_DELIVERY_NMI)
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{
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// TODO
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return;
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}
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if(vector < 0x10 || vector === 0xFF)
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{
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dbg_assert(false, "TODO: Invalid vector");
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}
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if(this.register_get_bit(this.irr, vector))
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{
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dbg_log("Not delivered: irr already set, vector=" + h(vector, 2), LOG_APIC);
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return;
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}
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this.register_set_bit(this.irr, vector);
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if(is_level)
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{
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this.register_set_bit(this.tmr, vector);
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}
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else
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{
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this.register_clear_bit(this.tmr, vector);
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}
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this.check_vector();
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};
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APIC.prototype.highest_irr = function()
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{
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var highest = this.register_get_highest_bit(this.irr);
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dbg_assert(highest !== 0xFF);
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dbg_assert(highest >= 0x10 || highest === -1);
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return highest;
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};
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APIC.prototype.highest_isr = function()
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{
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var highest = this.register_get_highest_bit(this.isr);
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dbg_assert(highest !== 0xFF);
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dbg_assert(highest >= 0x10 || highest === -1);
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return highest;
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};
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APIC.prototype.check_vector = function()
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{
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var highest_irr = this.highest_irr();
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if(highest_irr === -1)
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{
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return;
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}
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var highest_isr = this.highest_isr();
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if(highest_isr >= highest_irr)
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{
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APIC_LOG_VERBOSE && dbg_log("Higher isr, isr=" + h(highest_isr) + " irr=" + h(highest_irr), LOG_APIC);
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return;
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}
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if((highest_irr & 0xF0) <= (this.tpr & 0xF0))
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{
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APIC_LOG_VERBOSE && dbg_log("Higher tpr, tpr=" + h(this.tpr & 0xF0) + " irr=" + h(highest_irr), LOG_APIC);
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return;
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}
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this.cpu.handle_irqs();
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};
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APIC.prototype.acknowledge_irq = function()
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{
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var highest_irr = this.highest_irr();
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if(highest_irr === -1)
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{
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//dbg_log("Spurious", LOG_APIC);
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return;
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}
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var highest_isr = this.highest_isr();
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if(highest_isr >= highest_irr)
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{
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APIC_LOG_VERBOSE && dbg_log("Higher isr, isr=" + h(highest_isr) + " irr=" + h(highest_irr), LOG_APIC);
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return;
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}
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if((highest_irr & 0xF0) <= (this.tpr & 0xF0))
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{
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APIC_LOG_VERBOSE && dbg_log("Higher tpr, tpr=" + h(this.tpr & 0xF0) + " irr=" + h(highest_irr), LOG_APIC);
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return;
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}
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this.register_clear_bit(this.irr, highest_irr);
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this.register_set_bit(this.isr, highest_irr);
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APIC_LOG_VERBOSE && dbg_log("Calling vector " + h(highest_irr), LOG_APIC);
|
|
this.cpu.pic_call_irq(highest_irr);
|
|
|
|
this.check_vector();
|
|
};
|
|
|
|
APIC.prototype.get_state = function()
|
|
{
|
|
var state = [];
|
|
|
|
state[0] = this.apic_id;
|
|
state[1] = this.timer_divider;
|
|
state[2] = this.timer_divider_shift;
|
|
state[3] = this.timer_initial_count;
|
|
state[4] = this.timer_current_count;
|
|
state[5] = this.next_tick;
|
|
state[6] = this.lvt_timer;
|
|
state[7] = this.lvt_perf_counter;
|
|
state[8] = this.lvt_int0;
|
|
state[9] = this.lvt_int1;
|
|
state[10] = this.lvt_error;
|
|
state[11] = this.tpr;
|
|
state[12] = this.icr0;
|
|
state[13] = this.icr1;
|
|
state[14] = this.irr;
|
|
state[15] = this.isr;
|
|
state[16] = this.tmr;
|
|
state[17] = this.spurious_vector;
|
|
state[18] = this.destination_format;
|
|
state[19] = this.local_destination;
|
|
state[20] = this.error;
|
|
state[21] = this.read_error;
|
|
|
|
return state;
|
|
};
|
|
|
|
APIC.prototype.set_state = function(state)
|
|
{
|
|
this.apic_id = state[0];
|
|
this.timer_divider = state[1];
|
|
this.timer_divider_shift = state[2];
|
|
this.timer_initial_count = state[3];
|
|
this.timer_current_count = state[4];
|
|
this.next_tick = state[5];
|
|
this.lvt_timer = state[6];
|
|
this.lvt_perf_counter = state[7];
|
|
this.lvt_int0 = state[8];
|
|
this.lvt_int1 = state[9];
|
|
this.lvt_error = state[10];
|
|
this.tpr = state[11];
|
|
this.icr0 = state[12];
|
|
this.icr1 = state[13];
|
|
this.irr = state[14];
|
|
this.isr = state[15];
|
|
this.tmr = state[16];
|
|
this.spurious_vector = state[17];
|
|
this.destination_format = state[18];
|
|
this.local_destination = state[19];
|
|
this.error = state[20];
|
|
this.read_error = state[21];
|
|
};
|
|
|
|
// functions operating on 256-bit registers (for irr, isr, tmr)
|
|
APIC.prototype.register_get_bit = function(v, bit)
|
|
{
|
|
dbg_assert(bit >= 0 && bit < 256);
|
|
return v[bit >> 5] >> (bit & 31) & 1;
|
|
};
|
|
|
|
APIC.prototype.register_set_bit = function(v, bit)
|
|
{
|
|
dbg_assert(bit >= 0 && bit < 256);
|
|
v[bit >> 5] |= 1 << (bit & 31);
|
|
};
|
|
|
|
APIC.prototype.register_clear_bit = function(v, bit)
|
|
{
|
|
dbg_assert(bit >= 0 && bit < 256);
|
|
v[bit >> 5] &= ~(1 << (bit & 31));
|
|
};
|
|
|
|
APIC.prototype.register_get_highest_bit = function(v)
|
|
{
|
|
for(var i = 7; i >= 0; i--)
|
|
{
|
|
var word = v[i];
|
|
|
|
if(word)
|
|
{
|
|
return v86util.int_log2(word >>> 0) | i << 5;
|
|
}
|
|
}
|
|
|
|
return -1;
|
|
};
|