Fabian
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753a6d1fb3
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jit: handle fpu DA group
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2022-11-15 10:14:28 +09:00 |
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Fabian
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16662ec979
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jit: handle {66,}0f17
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2022-11-15 10:14:28 +09:00 |
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Fabian
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1c8e1bbdfa
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jit: handle {66,}0f16
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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37841eb0c9
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optimise and/or/xor/test; jc/jo/jbe/jl/jle
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2022-11-15 10:14:28 +09:00 |
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Fabian
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da1c713252
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optimise inc/dec; jcc
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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60b555107f
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identify add for the purpose of optimising conditions
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2022-11-15 10:14:28 +09:00 |
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Fabian
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7d6a3c67e4
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optimise sub8; jo/jb
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2022-11-15 10:14:28 +09:00 |
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Fabian
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bb0f37bbce
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optimise sub; jc
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2022-11-15 10:14:28 +09:00 |
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Fabian
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db65dd352d
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optimise test x, x followed by jz/js
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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5a7c946e83
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optimise get_last_result
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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a11eb20326
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type safety
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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58f9902057
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merge updates to last_op_size and flags_changed
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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53cea2e7b1
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Use optimised getcf for inc/dec/adc/sbb
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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be08d812db
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move code around (local_to_instruction_operand/LocalOrImmediate.to_instruction_operand)
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2022-11-15 10:14:28 +09:00 |
|
Fabian
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89e5173712
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Use regs::EAX over 0
|
2022-09-08 16:22:49 +09:00 |
|
Fabian
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2cbe54cf38
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Refactor some sse instructions into sse_read128_xmm_xmm_imm/sse_read128_xmm_mem_imm
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2022-09-06 01:05:39 +09:00 |
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Fabian
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1135122f8a
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Fix jitted cmpss/cmppd/shufps/shufpd with the same source and destination register
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2022-09-06 01:05:39 +09:00 |
|
Fabian
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0a359a2495
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Allow flags optimisation to be used for setcc/cmovcc instructions
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2022-09-06 00:26:39 +09:00 |
|
Fabian
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e50d4fa5a8
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Fix flags in cmpxchg in jit
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2022-09-06 00:26:39 +09:00 |
|
Fabian
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a464c77ec0
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Also mask other 16-bit arithmetic (not strictly necessary, but more robust for future changes)
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2022-09-06 00:26:39 +09:00 |
|
Fabian
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6e0ab79d4f
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Fix mask sign-extended 8-bit immediate to 16-bit for cmp (fixes #726)
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2022-09-06 00:26:39 +09:00 |
|
Fabian
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f1ebdb1c72
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implement fbstp (close #708)
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2022-08-02 21:40:57 +09:00 |
|
Fabian
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9cffa38ca0
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Use gen_set_reg16_unmasked for mov r16, imm
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2021-11-08 23:25:10 -05:00 |
|
Fabian
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36fcfe1b16
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jit not8/neg8
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2021-11-04 18:51:36 -05:00 |
|
Fabian
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23d4f862e6
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Avoid local when modrm address is single register without offset
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2021-11-04 18:51:36 -05:00 |
|
Fabian
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b4936b32d4
|
Dead
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2021-05-22 23:59:24 -05:00 |
|
Fabian
|
1b06e7bd34
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Improve code for some sign/zero-extending moves
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2021-05-22 23:58:23 -05:00 |
|
Fabian
|
d47be4342d
|
set_reg16 unmasked
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2021-05-22 23:58:23 -05:00 |
|
Fabian
|
c430c1141c
|
Minor optimisation for bt{,s,r,c} with zero offset
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2021-05-22 23:58:23 -05:00 |
|
Fabian
|
fd1626cd87
|
Fix movs jit
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2021-05-22 23:20:47 -05:00 |
|
Fabian
|
3137bf4171
|
Fix movsw jit
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2021-04-12 15:17:43 -05:00 |
|
Fabian
|
48464a18d7
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jit movsb/movsw/movsd
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2021-04-10 14:27:14 -05:00 |
|
Fabian
|
6049e0c46c
|
jit stosb/stosw/stosd
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2021-04-09 21:52:00 -05:00 |
|
Fabian
|
4de8584cff
|
jit scasw/scasd/lodsw/lodsd
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2021-04-09 21:15:25 -05:00 |
|
Fabian
|
7b66ae874d
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jit scasb
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2021-04-09 20:37:55 -05:00 |
|
Fabian
|
2e25308f17
|
jit lodsb
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2021-04-09 19:51:27 -05:00 |
|
Fabian
|
b48166280b
|
gen_pushf_popf_check
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2021-04-09 18:54:54 -05:00 |
|
Fabian
|
d929f4d7fd
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jit some 8-bit arithmetic
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2021-04-09 15:35:22 -05:00 |
|
Fabian
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b684342b2b
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Revert "jit 8E (mov sreg, reg)".
This optimisation was completely invalid, it's not possible call
switch_seg while in jit mode without saving registers.
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2021-04-09 15:32:46 -05:00 |
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Fabian
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bc1f239c2b
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jit {,66}0F{14,15} (unpcklps, unpcklpd, unpckhps, unpckhpd)
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2021-04-05 01:58:42 -05:00 |
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Fabian
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f4f3ec0ca1
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jit {,66}0F{12,13} (movhlps, movlps, movlpd, movlps, movlpd)
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2021-04-05 01:58:42 -05:00 |
|
Fabian
|
bbeca7a13d
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jit {F2,F3}0FC2 (cmpsd, cmpss)
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2021-04-04 23:36:54 -05:00 |
|
Fabian
|
2a22980cf7
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jit {F2,F3}0F2A (cvtsi2ss, cvtsi2sd)
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2021-04-04 23:32:06 -05:00 |
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Fabian
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2b2d22f6d3
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jit {,66}0F2A (cvtpi2ps, cvtsi2ss, cvtpi2pd, cvtsi2sd)
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2021-04-04 22:56:50 -05:00 |
|
Fabian
|
9e63bab294
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jit {,66}0F{2E,2F} (ucomiss, ucomisd, comiss, comisd)
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2021-04-04 22:32:36 -05:00 |
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Fabian
|
a0c4c32352
|
jit {,66,F2,F3}0F{5A,5B} (cvtps2pd, cvtpd2ps, cvtss2sd, cvtsd2ss, cvtdq2ps, cvtps2dq, cvttps2dq)
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2021-04-04 20:58:40 -05:00 |
|
Fabian
|
c5ca3ca09e
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jit 0F{74,75,76} (pcmpeqb, pcmpeqw, pcmpeqd)
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2021-04-04 16:27:26 -05:00 |
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Fabian
|
44c606f5a6
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jit 660F{75,76} (pcmpeqw, pcmpeqd)
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2021-04-04 16:23:37 -05:00 |
|
Fabian
|
73aa610f72
|
jit 8E (mov sreg, reg)
|
2021-04-04 16:02:22 -05:00 |
|
Fabian
|
28369ed790
|
jit {,66,F2,F3}0F{58,59,5C,5D,5E,5F} ({add,mul,sub,min,div,max}{ps,ss,pd,sd})
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2021-04-04 15:41:54 -05:00 |
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