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Author SHA1 Message Date
Fabian 6e68839365 jit mmx shift instructions (0F71/0F72/0F73) 2020-12-31 19:14:32 -06:00
Fabian 7dc24ba180 jit pshufw (0F70) 2020-12-31 19:14:32 -06:00
Fabian 835396386e jit more mmx instructions (0F6*) 2020-12-31 19:14:32 -06:00
Fabian 03d0c02a56 jit more sse instructions (660F6*) 2020-12-31 19:14:32 -06:00
Fabian 8c7bcdf094 jit sse mov instructions 2020-12-31 19:14:32 -06:00
Fabian a86d6c8f7e jit more sse instructions (660FD*) 2020-12-31 19:14:32 -06:00
Fabian 61b429c0b6 jit more sse instructions (660FE*) 2020-12-31 19:14:32 -06:00
Fabian 98ecc0d244 jit more sse instructions (660FF*) 2020-12-31 19:14:32 -06:00
Fabian 09c0099632 jit pmovmsk (0fd7/660fd7) 2020-12-31 19:14:32 -06:00
Fabian 78e6bc5995 jit more mmx instructions (0FD*) 2020-12-31 19:14:32 -06:00
Fabian 2711a3b356 jit more mmx instructions (0FE*) 2020-12-31 19:14:32 -06:00
Fabian 0b47c75a06 jit more mmx instructions (0FF*) 2020-12-31 19:14:32 -06:00
Fabian 56272ca397 s/cpu2/cpu 2020-12-31 19:14:32 -06:00
Fabian 159aaaa01f Move imm reads into generate_jit 2020-12-31 19:14:31 -06:00
Fabian ab46fe4f37 Refactor modrm decoding for jit 2020-12-31 19:14:31 -06:00
Fabian 31f02905b2 Avoid use cpu2::cpu::* in interpreter 2020-12-31 19:14:31 -06:00
Fabian 5dd03792c2 jit RDTSC 2020-12-31 19:14:31 -06:00
Fabian 5fea295191 lfence doesn't need to be a block boundary 2020-12-31 19:14:31 -06:00
Fabian 8f94cc2716 jit DB/6 FCOMI 2020-12-31 19:14:31 -06:00
Fabian 57b6421fae jit one more mmx instruction 2020-12-31 19:14:31 -06:00
Fabian 7ad30c7148 partially jit bsf/bsr 2020-12-31 19:14:31 -06:00
Fabian 8d39542271 Partially jit popcnt 2020-12-31 19:14:31 -06:00
Fabian 6e6762b293 jit some mmx instructions 2020-12-31 19:14:31 -06:00
Fabian 4860c6f461 jit 0F7E/0F7F mmx movd/movq 2020-12-31 19:14:31 -06:00
Fabian 44974370af jit 0F6E/0F6F mmx movd/movq 2020-12-31 19:14:31 -06:00
Fabian 4e6d925ee3 Use gen_trigger_ud 2020-12-31 19:14:31 -06:00
Fabian 9853bdb868 Merge 16-bit and 32-bit 0f tables (saves 200kB on v86.wasm) 2020-12-31 19:14:31 -06:00
Fabian 3711ed7f23 jit LAHF 2020-12-31 19:14:31 -06:00
Fabian 11dfeb1ee7 Fix minor descrepancy between analyser and jit 2020-12-31 19:14:31 -06:00
Fabian 29e0ef8c4c jit MOVNTI 2020-12-31 19:14:31 -06:00
Fabian c5eea8a8d1 Jit POPF 2020-12-31 19:14:30 -06:00
Fabian 03b88668ab Remove some unused #[no_mangle] 2020-12-31 19:14:30 -06:00
Fabian 822d1efcff Dead 2020-12-31 19:14:30 -06:00
Fabian 4e49468b7b Fix some minor fpu bugs and add more nasm tests 2020-12-31 19:14:30 -06:00
Fabian 2b36795763 Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days) 2020-12-31 19:14:30 -06:00
Fabian a26eb43719 Fix: Inhibit interrupts for one instruction after STI (fixes ReactOS) 2020-12-31 19:14:30 -06:00
Fabian 0edc821618 Jit DIV/IDIV 2020-12-31 19:14:30 -06:00
Fabian 3026e985fa Jit BT 2020-12-31 19:14:30 -06:00
Fabian e1c7b6ff9a Enable BT{,S,C,R} memory tests with immediate 2020-12-31 19:14:30 -06:00
Fabian 8f231431fc Simplify 2020-12-31 19:14:30 -06:00
Fabian fe89acfc80 Jit xchg r, r/m 2020-12-31 19:14:30 -06:00
Fabian 23988f50f6 Restore xlat in jit mode 2020-12-31 19:14:30 -06:00
Fabian acb8ad5423 Avoid console.assert (doesn't throw) 2020-12-31 19:14:30 -06:00
Fabian 92568a7ef2 Skip fldenv test 2020-12-31 19:14:30 -06:00
Fabian 62010e64e8 Make string instructions partially custom 2020-12-31 19:14:30 -06:00
Fabian a73988a817 Make loop, loopz, loopnz and jcxz custom generated 2020-12-31 19:14:30 -06:00
Fabian 232d3763d9 Make maskmov* custom 2020-12-31 19:14:30 -06:00
Fabian 6eed301779 Don't use is_osize_32 in instructions 2020-12-31 19:14:30 -06:00
Fabian 4972c3ae33 Dead 2020-12-31 19:14:30 -06:00
Fabian ccd6244cfd Split D9 and DD instructions by operand size 2020-12-31 19:14:30 -06:00
Fabian 3be6e8aa03 Dead 2020-12-31 19:14:29 -06:00
Fabian 591fccb5d8 Add some comments to unimplemented instructions 2020-12-31 19:14:29 -06:00
Fabian 0c561ece3d Enable nasm test for fnstsw 2020-12-31 19:14:29 -06:00
Fabian cd909c4f02 Add tests for fstenv/fldenv/fld [m80] 2020-12-31 19:14:29 -06:00
Fabian c207400922 Fix Rust warnings 2020-12-31 19:14:29 -06:00
Fabian 78ef12be68 Custom implementations for several sse instructions 
- mov dword/qword [mem], xmm
- mov xmm, dword/qword [mem]
- some arithmetic
 2020-12-31 19:14:28 -06:00
Fabian 4bb3c14e57 Comment 2020-12-31 19:14:28 -06:00
Fabian e99da40215 Make std/cld custom (FC/FD), remove unused unguarded_register and no_register properties from x86 table 2020-12-31 19:14:28 -06:00
Fabian 732cc2ee1c generate_interpreter: Don't stop after custom sse instructions (synchronised with check in generate_jit) 2020-12-31 19:14:28 -06:00
Fabian 0263764a5c Remove unused unguarded_register property during analysis 2020-12-31 19:14:28 -06:00
Fabian 5da6cde13f Custom codegen for cbw/cwde/cwd/cdq/pushf/sahf (98/99/9C/9E) 2020-12-31 19:14:28 -06:00
Fabian 701d59e0dd Custom codegen for absolute cli (FA) 2020-12-31 19:14:28 -06:00
Fabian ff64866e25 Custom codegen for absolute cmpxchg (0FB1) 2020-12-31 19:14:28 -06:00
Fabian b5a72061fb Custom codegen for absolute jmp/call (FF_2/FF_4) 2020-12-31 19:14:28 -06:00
Fabian fb7e4d376a Custom codegen for lfence (0FAE_5) 2020-12-31 19:14:28 -06:00
Fabian b240a8fde9 Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8) 2020-12-31 19:14:28 -06:00
Fabian a9dac09ceb Custom codegen for xchg (91-98) 2020-12-31 19:14:28 -06:00
Fabian 091b2324d9 Custom codegen for 8C 2020-12-31 19:14:28 -06:00
Fabian 93ffd50969 Custom codegen for more sse move aliases (660F29/660F6F/F30F7F) 2020-08-30 19:37:15 -05:00
Fabian 75e5c2a56f Codegen for 8-bit shifts (D0/D2) 2020-08-30 19:37:15 -05:00
Fabian 815e5d338e Codegen more fpu instructions and run their tests (D9_6, DA_5) 2020-08-30 19:37:15 -05:00
Fabian fdd1dc377d Custom codegen for xadd (0FC1) 2020-08-30 19:37:15 -05:00
Fabian 874818866a Codegen for mul32 + custom mul/imul (F7_[45]) 2020-08-30 19:37:15 -05:00
Fabian 7024207fa4 Codegen for inc/dec (group 40-4F) 2020-08-30 19:37:15 -05:00
Fabian a8308b988d Store registers in locals 
This changes registers to be temporarily stored in wasm locals, across
each complete wasm module. Registers are moved from memory to locals
upon entering the wasm module and moved from locals to memory upon
leaving. Additionally, calls to functions that modify registers are
wrapped between moving registers to memory before and moving back to
locals after. This affects:

1. All non-custom instructions
2. safe_{read,write}_slow, since it may page fault (the slow path of all memory accesses)
3. task_switch_test* and trigger_ud
4. All block boundaries
5. The fallback functions of gen_safe_read_write (read-modify-write memory accesses)

The performance benefits are currently mostly eaten up by 1. and 4. (if
one calculates the total number of read/writes to registers in memory,
they are higher after this patch, as each instructions of typ 1. or 4.
requires moving all 8 register twice). This can be improved later by the
relatively mechanical work of making instructions custom (not
necessarily full code generation, only the part of the instruction where
registers are accessed). Multi-page wasm module generation will
significantly reduce the number of type 4. instructions.

Due to 2., the overall code size has significantly increased. This case
(the slow path of memory access) is often generated but rarely executed.
These moves can be removed in a later patch by a different scheme for
safe_{read,write}_slow, which has been left out of this patch for
simplicity of reviewing.

This also simplifies our code generation for storing registers, as

    instructions_body.const_i32(register_offset);
    // some computations ...
    instruction_body.store_i32();

turns into:

    // some computations ...
    write_register(register_index);

I.e., a prefix is not necessary anymore as locals are indexed directly.

Further patches will allow getting rid of some temporary locals, as
registers now can be used directly.
 2020-08-30 19:37:15 -05:00
Fabian f5540d9edf Use pop16_reg_jit for pop esp 2020-08-30 19:37:15 -05:00
Fabian 0c42ea0d1f Custom code generation for leave (C9) 2020-08-30 19:37:15 -05:00
Fabian 837e6ff362 Custom code generation for ret imm (C2) 2020-08-30 19:37:15 -05:00
Fabian c0f1d2a487 Custom code generation for arith al/ax/eax, imm (group [0123][45CD], A8/A9) 2020-08-30 19:37:15 -05:00
Fabian c9163c2df5 Custom code generation for mov reg, imm (B0-BF) 2020-08-30 19:37:15 -05:00
Fabian 2837ccd06b Support for gen_safe_read128 and code generation for MOVDQU (F30F6F) 2020-08-30 19:37:15 -05:00
Fabian dca6be2d94 Also generate nop for prefetch instruction 2020-08-30 19:37:15 -05:00
Fabian 440b67eda5 Support for gen_safe_write128 and code generation for MOVAPS/MOVDQA (0F29/660F7F) 2020-08-30 19:37:15 -05:00
Fabian e2ab5eabdd Code generation for missing memory operations (8-bit shifts, shrd, shld, xadd) 2020-08-30 19:37:15 -05:00
Fabian ec846b34d9 Codegen for fpu instructions (misc instructions) (D9_[14], DB_5, DD_5, DF_4) 2020-08-30 19:37:15 -05:00
Fabian 1eab44746b Codegen for fpu instructions (fldcw/fstcw) (D9_5, D9_7) 2020-08-30 19:37:15 -05:00
Fabian fdce557820 Codegen for fpu instructions (memory stores: fst/fstp/fist/fistp) (D9_[23], DB_[23], DD_[23], DF_[237]) 2020-08-30 19:37:15 -05:00
Fabian 7c99bdae74 Codegen for fpu instructions (memory loads: fld, fild) (D9_0, DB_0, DD_0, DF_5) 2020-08-30 19:37:15 -05:00
Fabian c452c357dd Codegen for fpu instructions (DE group) 2020-08-30 19:37:15 -05:00
Fabian 21caefbffd Codegen for fpu instructions (DC group) 2020-08-30 19:37:15 -05:00
Fabian ec059a9f27 Codegen for fpu instructions (D8 group) 2020-08-30 19:37:15 -05:00
Fabian 05296b0586 Enable fpu instructions in nasm tests 2020-08-30 19:37:15 -05:00
Fabian 38b8435c88 Print eip on bad instruction encodings 2020-08-30 19:37:15 -05:00
Fabian 0798a0b40e Don't create unnecessary entry points 
This commit prevents creation of entry points for jumps within the same
page. In interpreted mode, execution is continued on these kinds of
jumps.

Since this prevents the old hotness detection from working efficiently,
hotness detection has also been changed to work based on instruction
counters, and is such more precise (longer basic blocks are compiled
earlier).

This also breaks the old detection loop safety mechanism and causes
Linux to sometimes loop forever on "calibrating delay loop", so
JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
 2020-08-30 19:29:54 -05:00
Fabian 7e3f1ad401 gen_fn: Accept wasm builder, not jit context 2020-08-30 19:29:54 -05:00
Fabian 5eaece7743 jit memory moves with immediate address (A0/A1/A2/A3) 2020-08-30 19:29:54 -05:00
Fabian 8de547455e jit memory access for imul 2020-08-30 19:29:54 -05:00
Fabian 6a2cd6419d jit memory access for 8-bit read-modify-write operations with immediate 2020-08-30 19:29:54 -05:00
Fabian 2635ed71b4 jit memory access for 8-bit read-modify-write operations 2020-08-30 19:29:54 -05:00
Awal Garg 54151e2306 jit 0x0FBF 2020-08-30 19:29:54 -05:00