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v86/gen/x86_table.js

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Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
"use strict";
Move around and add some assertions
2018-04-12 19:32:48 +02:00
const { hex } = require("./util");
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
// http://ref.x86asm.net/coder32.html
const zf = 1 << 6;
const of = 1 << 11;
const cf = 1 << 0;
const af = 1 << 4;
const pf = 1 << 2;
const sf = 1 << 7;
Don't create unnecessary entry points This commit prevents creation of entry points for jumps within the same page. In interpreted mode, execution is continued on these kinds of jumps. Since this prevents the old hotness detection from working efficiently, hotness detection has also been changed to work based on instruction counters, and is such more precise (longer basic blocks are compiled earlier). This also breaks the old detection loop safety mechanism and causes Linux to sometimes loop forever on "calibrating delay loop", so JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
2018-09-18 01:34:10 +02:00
// === Types of instructions
//
// create entry | check for compiled code | instruction
// -------------+-------------------------+-----------------------------------------------------------
// 1 | optional | pop ds (may change cpu state)
// | | trigger_ud, div (exception that doesn't generate conditional return from BB)
// | | port io, popf, sti (may call interrupt or continue at next instruction)
// | | hlt
// -------------+-------------------------+-----------------------------------------------------------
// 1 | 1 | call [eax], jmp [eax], int, iret, ret, jmpf, callf, sysenter, sysexit
// | | Special case: normal instruction with fallthough to next page
// | | Special case: after execution of compiled code
// | | -> may create redundant entry points depending on last instruction?
// -------------+-------------------------+-----------------------------------------------------------
// 1 | 0 | rep movs, rep lods, rep stos, rep cmps, rep scas
// | | -> Executed as follows:
// | | - Upto including the first call in compiled mode
// | | - Back to main loop and repeated in interpreted mode (as entry point is after instruction, not on)
// | | - When finished entry pointer *after* instruction is hit and execution continues in compiled mode
// -------------+-------------------------+-----------------------------------------------------------
// 0 | optional | jmp foo, jnz foo
// | | (foo is in the same page as the instruction)
// -------------+-------------------------+-----------------------------------------------------------
// 1 | 1 | call foo
// | | (foo is in the same page as the instruction)
// | | -> The entry point is not created for jumps within
// | | this page, but speculatively for calls from
// | | other pages to the function in this page
// -------------+-------------------------+-----------------------------------------------------------
// 1 | 1 | call foo, jmp foo, jnz foo
// | | (foo is in a different page than the instruction)
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Explain
2021-01-01 02:14:33 +01:00
// e: a modrm byte follows the operand
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
// os: the instruction behaves differently depending on the operand size
Explain
2021-01-01 02:14:33 +01:00
// fixed_g: the reg field of the modrm byte selects an instruction
// skip: skip automatically generated tests (nasmtests)
// mask_flags: flags bits to mask in generated tests
// prefix: is a prefix instruction
// imm8, imm8s, imm16, imm1632, immaddr, extra_imm8, extra_imm16: one or two immediate bytes follows the instruction
// custom: will callback jit to generate custom code
// block_boundary: may change eip in a way not handled by the jit
// no_next_instruction: jit will stop analysing after instruction (e.g., unconditional jump, ret)
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
const encodings = [
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x00, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x01, custom: 1, os: 1, e: 1, },
{ opcode: 0x02, custom: 1, e: 1, },
{ opcode: 0x03, custom: 1, os: 1, e: 1, },
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x08, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x09, custom: 1, os: 1, e: 1, },
{ opcode: 0x0A, custom: 1, e: 1, },
{ opcode: 0x0B, custom: 1, os: 1, e: 1, },
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x10, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x11, custom: 1, os: 1, e: 1, },
{ opcode: 0x12, custom: 1, e: 1, },
{ opcode: 0x13, custom: 1, os: 1, e: 1, },
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x18, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x19, custom: 1, os: 1, e: 1, },
{ opcode: 0x1A, custom: 1, e: 1, },
{ opcode: 0x1B, custom: 1, os: 1, e: 1, },
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x20, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x21, custom: 1, os: 1, e: 1, },
{ opcode: 0x22, custom: 1, e: 1, },
{ opcode: 0x23, custom: 1, os: 1, e: 1, },
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x28, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x29, custom: 1, os: 1, e: 1, },
{ opcode: 0x2A, custom: 1, e: 1, },
{ opcode: 0x2B, custom: 1, os: 1, e: 1, },
jit memory access for 8-bit read-modify-write operations
2018-09-13 18:25:13 +02:00
{ opcode: 0x30, custom: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x31, custom: 1, os: 1, e: 1, },
{ opcode: 0x32, custom: 1, e: 1, },
{ opcode: 0x33, custom: 1, os: 1, e: 1, },
{ opcode: 0x38, custom: 1, e: 1, },
{ opcode: 0x39, custom: 1, os: 1, e: 1, },
{ opcode: 0x3A, custom: 1, e: 1, },
{ opcode: 0x3B, custom: 1, os: 1, e: 1, },
Partial custom implementation for arithmethic instructions with read-memory
2018-08-23 00:21:16 +02:00
Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8)
2021-01-01 02:14:28 +01:00
{ opcode: 0x06, os: 1, custom: 1 },
Remove use of cpu exceptions for trigger_ss (partially including switch_seg)
2018-07-20 22:39:06 +02:00
{ opcode: 0x07, os: 1, skip: 1, block_boundary: 1, }, // pop es: block_boundary since it uses non-raising cpu exceptions
Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8)
2021-01-01 02:14:28 +01:00
{ opcode: 0x0E, os: 1, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x0F, os: 1, prefix: 1, },
Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8)
2021-01-01 02:14:28 +01:00
{ opcode: 0x16, os: 1, custom: 1 },
Annotate some instructions
2018-06-17 03:12:05 +02:00
{ opcode: 0x17, block_boundary: 1, os: 1, skip: 1, }, // pop ss
Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8)
2021-01-01 02:14:28 +01:00
{ opcode: 0x1E, os: 1, custom: 1 },
Annotate some instructions
2018-06-17 03:12:05 +02:00
{ opcode: 0x1F, block_boundary: 1, os: 1, skip: 1, }, // pop ds
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x26, prefix: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x27, mask_flags: of, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x2E, prefix: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x2F, mask_flags: of, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x36, prefix: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x37, mask_flags: of | sf | pf | zf, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x3E, prefix: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x3F, mask_flags: of | sf | pf | zf, },
Codegen for inc/dec (group 40-4F)
2018-12-25 12:40:00 +01:00
{ opcode: 0x40, os: 1, custom: 1 },
{ opcode: 0x41, os: 1, custom: 1 },
{ opcode: 0x42, os: 1, custom: 1 },
{ opcode: 0x43, os: 1, custom: 1 },
{ opcode: 0x44, os: 1, custom: 1 },
{ opcode: 0x45, os: 1, custom: 1 },
{ opcode: 0x46, os: 1, custom: 1 },
{ opcode: 0x47, os: 1, custom: 1 },
{ opcode: 0x48, os: 1, custom: 1 },
{ opcode: 0x49, os: 1, custom: 1 },
{ opcode: 0x4A, os: 1, custom: 1 },
{ opcode: 0x4B, os: 1, custom: 1 },
{ opcode: 0x4C, os: 1, custom: 1 },
{ opcode: 0x4D, os: 1, custom: 1 },
{ opcode: 0x4E, os: 1, custom: 1 },
{ opcode: 0x4F, os: 1, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove block_boundary from push
2018-08-20 20:11:43 +02:00
{ opcode: 0x50, custom: 1, os: 1 },
{ opcode: 0x51, custom: 1, os: 1 },
{ opcode: 0x52, custom: 1, os: 1 },
{ opcode: 0x53, custom: 1, os: 1 },
{ opcode: 0x54, custom: 1, os: 1 },
{ opcode: 0x55, custom: 1, os: 1 },
{ opcode: 0x56, custom: 1, os: 1 },
{ opcode: 0x57, custom: 1, os: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Optimize push/pop JIT instructions to not check stack_size_32 We generate a version of the push/pop instruction with the stack_size_32 fixed, since the state tends not to change much. If it does change, state_flags won't match the output of pack_current_state_flags and the cache entry will therefore be invalidated.
2018-02-22 15:30:04 +01:00
{ opcode: 0x58, custom: 1, os: 1, },
{ opcode: 0x59, custom: 1, os: 1, },
{ opcode: 0x5A, custom: 1, os: 1, },
{ opcode: 0x5B, custom: 1, os: 1, },
Use pop16_reg_jit for pop esp
2018-12-21 02:52:36 +01:00
{ opcode: 0x5C, custom: 1, os: 1, },
Optimize push/pop JIT instructions to not check stack_size_32 We generate a version of the push/pop instruction with the stack_size_32 fixed, since the state tends not to change much. If it does change, state_flags won't match the output of pack_current_state_flags and the cache entry will therefore be invalidated.
2018-02-22 15:30:04 +01:00
{ opcode: 0x5D, custom: 1, os: 1, },
{ opcode: 0x5E, custom: 1, os: 1, },
{ opcode: 0x5F, custom: 1, os: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x60, os: 1, },
{ opcode: 0x61, os: 1, },
{ opcode: 0x62, e: 1, skip: 1, },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x63, e: 1, block_boundary: 1, }, // arpl
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x64, prefix: 1, },
{ opcode: 0x65, prefix: 1, },
{ opcode: 0x66, prefix: 1, },
{ opcode: 0x67, prefix: 1, },
Remove block_boundary from push
2018-08-20 20:11:43 +02:00
{ opcode: 0x68, custom: 1, os: 1, imm1632: 1 },
jit memory access for imul
2018-09-13 19:30:35 +02:00
{ opcode: 0x69, os: 1, e: 1, custom: 1, imm1632: 1, mask_flags: af, }, // zf?
Remove block_boundary from push
2018-08-20 20:11:43 +02:00
{ opcode: 0x6A, custom: 1, os: 1, imm8s: 1 },
jit memory access for imul
2018-09-13 19:30:35 +02:00
{ opcode: 0x6B, os: 1, e: 1, custom: 1, imm8s: 1, mask_flags: af, }, // zf?
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Make string instructions partially custom
2021-01-01 02:14:30 +01:00
{ opcode: 0x6C, block_boundary: 1, custom: 1, is_string: 1, skip: 1, }, // ins
{ opcode: 0xF26C, block_boundary: 1, custom: 1, is_string: 1, skip: 1, },
{ opcode: 0xF36C, block_boundary: 1, custom: 1, is_string: 1, skip: 1, },
{ opcode: 0x6D, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1, },
{ opcode: 0xF26D, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1, },
{ opcode: 0xF36D, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1, },
{ opcode: 0x6E, block_boundary: 1, custom: 1, is_string: 1, skip: 1, }, // outs
{ opcode: 0xF26E, block_boundary: 1, custom: 1, is_string: 1, skip: 1, },
{ opcode: 0xF36E, block_boundary: 1, custom: 1, is_string: 1, skip: 1, },
{ opcode: 0x6F, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1, },
{ opcode: 0xF26F, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1, },
{ opcode: 0xF36F, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x84, custom: 1, e: 1, },
{ opcode: 0x85, custom: 1, e: 1, os: 1, },
Jit xchg r, r/m
2021-01-01 02:14:30 +01:00
{ opcode: 0x86, custom: 1, e: 1, },
{ opcode: 0x87, custom: 1, os: 1, e: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x88, custom: 1, e: 1, },
{ opcode: 0x89, custom: 1, os: 1, e: 1, },
{ opcode: 0x8A, custom: 1, e: 1, },
{ opcode: 0x8B, custom: 1, os: 1, e: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Custom codegen for 8C
2021-01-01 02:14:28 +01:00
{ opcode: 0x8C, os: 1, e: 1, custom: 1 }, // mov reg, sreg
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x8D, reg_ud: 1, os: 1, e: 1, custom_modrm_resolve: 1, custom: 1, }, // lea
Annotate some instructions
2018-06-17 03:12:05 +02:00
{ opcode: 0x8E, block_boundary: 1, e: 1, skip: 1, }, // mov sreg
Handle pagefaults without JS exceptions This commit makes the return type of most basic memory access primitives Result, where the Err(()) case means a page fault happened, the instruction should be aborted and execution should continue at the page fault handler. The following primites have a Result return type: safe_{read,write}*, translate_address_*, read_imm*, writable_or_pagefault, get_phys_eip, modrm_resolve, push*, pop*. Any instruction needs to handle the page fault cases and abort execution appropriately. The return_on_pagefault! macro has been provided to get the same behaviour as the previously used JS exceptions (local to the function). Calls from JavaScript abort on a pagefault, except for writable_or_pagefault, which returns a boolean. JS needs to check before calling any function that may pagefault. This commit does not yet pervasively apply return_on_pagefault!, this will be added in the next commit. Jitted code does not yet properly handle the new form of page faults, this will be added in a later commit.
2018-08-14 23:07:54 +02:00
{ opcode: 0x8F, os: 1, e: 1, fixed_g: 0, custom_modrm_resolve: 1, custom: 1, block_boundary: 1, }, // pop r/m
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x90, custom: 1, },
Custom codegen for xchg (91-98)
2021-01-01 02:14:28 +01:00
{ opcode: 0x91, custom: 1, os: 1, },
{ opcode: 0x92, custom: 1, os: 1, },
{ opcode: 0x93, custom: 1, os: 1, },
{ opcode: 0x94, custom: 1, os: 1, },
{ opcode: 0x95, custom: 1, os: 1, },
{ opcode: 0x96, custom: 1, os: 1, },
{ opcode: 0x97, custom: 1, os: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
Custom codegen for cbw/cwde/cwd/cdq/pushf/sahf (98/99/9C/9E)
2021-01-01 02:14:28 +01:00
{ opcode: 0x98, os: 1, custom: 1 },
{ opcode: 0x99, os: 1, custom: 1 },
gen: s/jump/block_boundary/
2018-04-02 09:50:03 +02:00
{ opcode: 0x9A, os: 1, imm1632: 1, extra_imm16: 1, skip: 1, block_boundary: 1, }, // callf
Mark fwait as block boundary again (fixes qnx hanging)
2021-01-01 02:14:33 +01:00
{ opcode: 0x9B, block_boundary: 1, skip: 1, }, // fwait: block_boundary since it uses non-raising cpu exceptions
Custom codegen for cbw/cwde/cwd/cdq/pushf/sahf (98/99/9C/9E)
2021-01-01 02:14:28 +01:00
{ opcode: 0x9C, os: 1, custom: 1 },
Jit POPF
2021-01-01 02:14:30 +01:00
{ opcode: 0x9D, os: 1, skip: 1, custom: 1, },
Custom codegen for cbw/cwde/cwd/cdq/pushf/sahf (98/99/9C/9E)
2021-01-01 02:14:28 +01:00
{ opcode: 0x9E, custom: 1 },
jit LAHF
2021-01-01 02:14:31 +01:00
{ opcode: 0x9F, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit memory moves with immediate address (A0/A1/A2/A3)
2018-09-13 20:01:04 +02:00
{ opcode: 0xA0, custom: 1, immaddr: 1 },
{ opcode: 0xA1, custom: 1, os: 1, immaddr: 1 },
{ opcode: 0xA2, custom: 1, immaddr: 1 },
{ opcode: 0xA3, custom: 1, os: 1, immaddr: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Annotate instruction table with jumping instructions
2017-12-20 00:17:43 +01:00
// string instructions aren't jumps, but they modify eip due to how they're implemented
Don't create unnecessary entry points This commit prevents creation of entry points for jumps within the same page. In interpreted mode, execution is continued on these kinds of jumps. Since this prevents the old hotness detection from working efficiently, hotness detection has also been changed to work based on instruction counters, and is such more precise (longer basic blocks are compiled earlier). This also breaks the old detection loop safety mechanism and causes Linux to sometimes loop forever on "calibrating delay loop", so JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
2018-09-18 01:34:10 +02:00
// TODO: The block_boundary on the non-rep instructions can be removed once they're custom
Make string instructions partially custom
2021-01-01 02:14:30 +01:00
{ opcode: 0xA4, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF2A4, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF3A4, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xA5, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF2A5, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF3A5, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xA6, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF2A6, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF3A6, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xA7, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF2A7, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF3A7, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Custom code generation for arith al/ax/eax, imm (group [0123][45CD], A8/A9)
2018-12-18 20:29:30 +01:00
{ opcode: 0xA8, custom: 1, imm8: 1, },
{ opcode: 0xA9, custom: 1, os: 1, imm1632: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Make string instructions partially custom
2021-01-01 02:14:30 +01:00
{ opcode: 0xAA, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF2AA, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF3AA, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xAB, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF2AB, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF3AB, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xAC, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF2AC, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF3AC, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xAD, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF2AD, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF3AD, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xAE, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF2AE, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xF3AE, block_boundary: 1, custom: 1, is_string: 1, },
{ opcode: 0xAF, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF2AF, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
{ opcode: 0xF3AF, block_boundary: 1, custom: 1, is_string: 1, os: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Generate direct control flow, using wasm blocks and loops
2021-01-01 02:14:33 +01:00
{ opcode: 0xC2, custom: 1, block_boundary: 1, no_next_instruction: 1, os: 1, absolute_jump: 1, imm16: 1, skip: 1, }, // ret
{ opcode: 0xC3, custom: 1, block_boundary: 1, no_next_instruction: 1, os: 1, absolute_jump: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of cpu exceptions for trigger_ss (partially including switch_seg)
2018-07-20 22:39:06 +02:00
{ opcode: 0xC4, block_boundary: 1, os: 1, e: 1, skip: 1, }, // les
Annotate some instructions
2018-06-17 03:12:05 +02:00
{ opcode: 0xC5, block_boundary: 1, os: 1, e: 1, skip: 1, }, // lds
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Custom implementation for 'mov r/m, imm'
2018-08-22 04:38:11 +02:00
{ opcode: 0xC6, custom: 1, e: 1, fixed_g: 0, imm8: 1 },
C6/C7 don't need to marked as block boundary
2018-08-22 04:34:17 +02:00
{ opcode: 0xC7, custom: 1, os: 1, e: 1, fixed_g: 0, imm1632: 1 },
Fix jit in presence of new page fault handling Makes the following a block boundary: - push - Any non-custom instruction that uses modrm encoding - Any sse/fpu instruction This commit affects performance negatively. In order to fix this, the above instructions need to be implemented using custom code generators for the memory access.
2018-08-16 21:37:10 +02:00
// XXX: Temporary block boundary
{ opcode: 0xC8, os: 1, imm16: 1, extra_imm8: 1, block_boundary: 1, }, // enter
Custom code generation for leave (C9)
2018-12-18 23:57:21 +01:00
{ opcode: 0xC9, custom: 1, os: 1, skip: 1 }, // leave
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
New block analysis, generation of state machine with multiple basic blocks This commit consists of three components: 1. A new generated x86-parser that analyses instructions. For now, it only detects the control flow of an instruction: Whether it is a (conditional) jump, a normal instruction or a basic block boundary 2. A new function, jit_find_basic_blocks, that finds and connects basic blocks using 1. It loosely finds all basic blocks making up a function, i.e. it doesn't follow call or return instructions (but it does follow all near jumps). Different from our previous analysis, it also finds basic blocks in the strict sense that no basic block contains a jump into the middle of another basic block 3. A new code-generating function, jit_generate, that takes the output of 2 as input. It generates a state machine: - Each basic block becomes a case block in a switch-table - Each basic block ends with setting a state variable for the following basic block - The switch-table is inside a while(true) loop, which is terminated by return statements in basic blocks which are leaves Additionally: - Block linking has been removed as it is (mostly) obsoleted by these changes. It may later be reactived for call instructions - The code generator API has been extended to generate the code for the state machine - The iterations of the state machine are limited in order to avoid infinite loops that can't be interrupted
2018-03-21 19:01:32 +01:00
{ opcode: 0xCA, block_boundary: 1, no_next_instruction: 1, os: 1, imm16: 1, skip: 1, }, // retf
{ opcode: 0xCB, block_boundary: 1, no_next_instruction: 1, os: 1, skip: 1, },
{ opcode: 0xCC, block_boundary: 1, skip: 1, }, // int
gen: s/jump/block_boundary/
2018-04-02 09:50:03 +02:00
{ opcode: 0xCD, block_boundary: 1, skip: 1, imm8: 1, },
{ opcode: 0xCE, block_boundary: 1, skip: 1, },
New block analysis, generation of state machine with multiple basic blocks This commit consists of three components: 1. A new generated x86-parser that analyses instructions. For now, it only detects the control flow of an instruction: Whether it is a (conditional) jump, a normal instruction or a basic block boundary 2. A new function, jit_find_basic_blocks, that finds and connects basic blocks using 1. It loosely finds all basic blocks making up a function, i.e. it doesn't follow call or return instructions (but it does follow all near jumps). Different from our previous analysis, it also finds basic blocks in the strict sense that no basic block contains a jump into the middle of another basic block 3. A new code-generating function, jit_generate, that takes the output of 2 as input. It generates a state machine: - Each basic block becomes a case block in a switch-table - Each basic block ends with setting a state variable for the following basic block - The switch-table is inside a while(true) loop, which is terminated by return statements in basic blocks which are leaves Additionally: - Block linking has been removed as it is (mostly) obsoleted by these changes. It may later be reactived for call instructions - The code generator API has been extended to generate the code for the state machine - The iterations of the state machine are limited in order to avoid infinite loops that can't be interrupted
2018-03-21 19:01:32 +01:00
{ opcode: 0xCF, block_boundary: 1, no_next_instruction: 1, os: 1, skip: 1, }, // iret
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of cpu exceptions for divisions
2018-07-19 23:21:01 +02:00
{ opcode: 0xD4, imm8: 1, block_boundary: 1, }, // aam, may trigger #de
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xD5, imm8: 1, mask_flags: of | cf | af, },
{ opcode: 0xD6, },
Fix jit in presence of new page fault handling Makes the following a block boundary: - push - Any non-custom instruction that uses modrm encoding - Any sse/fpu instruction This commit affects performance negatively. In order to fix this, the above instructions need to be implemented using custom code generators for the memory access.
2018-08-16 21:37:10 +02:00
Restore xlat in jit mode
2021-01-01 02:14:30 +01:00
{ opcode: 0xD7, skip: 1, custom: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Codegen for fpu instructions (D8 group)
2018-12-03 23:00:05 +01:00
{ opcode: 0xD8, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xD8, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
Split D9 and DD instructions by operand size
2021-01-01 02:14:30 +01:00
{ opcode: 0xD9, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xD9, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1, }, // fldenv (mem)
Split D9 and DD instructions by operand size
2021-01-01 02:14:30 +01:00
{ opcode: 0xD9, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
{ opcode: 0xD9, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, skip: 1, }, // fstenv (mem), fprem (reg)
Fix some minor fpu bugs and add more nasm tests
2021-01-01 02:14:30 +01:00
{ opcode: 0xD9, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, skip_reg: 1, }, // fprem, fyl2xp1 (precision issues)
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
{ opcode: 0xDA, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDA, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDA, e: 1, fixed_g: 2, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDA, e: 1, fixed_g: 3, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDA, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
Codegen more fpu instructions and run their tests (D9_6, DA_5)
2019-01-07 15:45:10 +01:00
{ opcode: 0xDA, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
{ opcode: 0xDA, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDA, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
Codegen for fpu instructions (memory loads: fld, fild) (D9_0, DB_0, DD_0, DF_5)
2018-12-04 01:09:41 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, skip_mem: 1, }, // unimplemented: fisttp (sse3)
jit DB/6 FCOMI
2021-01-01 02:14:31 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDB, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, },
Add tests for fstenv/fldenv/fld [m80]
2021-01-01 02:14:29 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
jit DB/6 FCOMI
2021-01-01 02:14:31 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
{ opcode: 0xDB, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, },
Codegen for fpu instructions (DC group)
2018-12-03 23:49:52 +01:00
{ opcode: 0xDC, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDC, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
Split D9 and DD instructions by operand size
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1, }, // unimplemented: fisttp (sse3)
Split D9 and DD instructions by operand size
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
{ opcode: 0xDD, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1 }, // frstor
Split D9 and DD instructions by operand size
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1 }, // fsave
Split D9 and DD instructions by operand size
2021-01-01 02:14:30 +01:00
{ opcode: 0xDD, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
Codegen for fpu instructions (DE group)
2018-12-04 00:46:35 +01:00
{ opcode: 0xDE, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDE, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDE, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, },
Codegen more fpu instructions and run their tests (D9_6, DA_5)
2019-01-07 15:45:10 +01:00
{ opcode: 0xDE, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, },
Codegen for fpu instructions (DE group)
2018-12-04 00:46:35 +01:00
{ opcode: 0xDE, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDE, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDE, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, },
{ opcode: 0xDE, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1 },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 1, custom: 0, is_fpu: 1, task_switch_test: 1, skip_mem: 1 }, // unimplemented: fisttp (sse3)
Codegen for fpu instructions (memory stores: fst/fstp/fist/fistp) (D9_[23], DB_[23], DD_[23], DF_[237])
2018-12-05 23:40:42 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
{ opcode: 0xDF, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
Rename only_{reg,mem} to skip_{mem,reg} (only relevant to tests these days)
2021-01-01 02:14:30 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, skip_mem: 1 }, // unimplemented: Binary Coded Decimals
Codegen for fpu instructions (memory loads: fld, fild) (D9_0, DB_0, DD_0, DF_5)
2018-12-04 01:09:41 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, },
jit fcomip df_6
2021-01-01 02:14:33 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, skip_mem: 1 }, // unimplemented: Binary Coded Decimals
Codegen more fpu instructions and run their tests (D9_6, DA_5)
2019-01-07 15:45:10 +01:00
{ opcode: 0xDF, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
New block analysis, generation of state machine with multiple basic blocks This commit consists of three components: 1. A new generated x86-parser that analyses instructions. For now, it only detects the control flow of an instruction: Whether it is a (conditional) jump, a normal instruction or a basic block boundary 2. A new function, jit_find_basic_blocks, that finds and connects basic blocks using 1. It loosely finds all basic blocks making up a function, i.e. it doesn't follow call or return instructions (but it does follow all near jumps). Different from our previous analysis, it also finds basic blocks in the strict sense that no basic block contains a jump into the middle of another basic block 3. A new code-generating function, jit_generate, that takes the output of 2 as input. It generates a state machine: - Each basic block becomes a case block in a switch-table - Each basic block ends with setting a state variable for the following basic block - The switch-table is inside a while(true) loop, which is terminated by return statements in basic blocks which are leaves Additionally: - Block linking has been removed as it is (mostly) obsoleted by these changes. It may later be reactived for call instructions - The code generator API has been extended to generate the code for the state machine - The iterations of the state machine are limited in order to avoid infinite loops that can't be interrupted
2018-03-21 19:01:32 +01:00
// loop, jcxz, etc.
Make loop, loopz, loopnz and jcxz custom generated
2021-01-01 02:14:30 +01:00
{ opcode: 0xE0, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1, },
{ opcode: 0xE1, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1, },
{ opcode: 0xE2, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1, },
{ opcode: 0xE3, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Address review
2018-01-05 04:36:21 +01:00
// port functions aren't jumps, but they may modify eip due to how they are implemented
gen: s/jump/block_boundary/
2018-04-02 09:50:03 +02:00
{ opcode: 0xE4, block_boundary: 1, imm8: 1, skip: 1, }, // in
{ opcode: 0xE5, block_boundary: 1, os: 1, imm8: 1, skip: 1, },
{ opcode: 0xE6, block_boundary: 1, imm8: 1, skip: 1, }, // out
{ opcode: 0xE7, block_boundary: 1, os: 1, imm8: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove block_boundary from push
2018-08-20 20:11:43 +02:00
{ opcode: 0xE8, block_boundary: 1, jump_offset_imm: 1, os: 1, imm1632: 1, custom: 1, skip: 1, }, // call
Don't create unnecessary entry points This commit prevents creation of entry points for jumps within the same page. In interpreted mode, execution is continued on these kinds of jumps. Since this prevents the old hotness detection from working efficiently, hotness detection has also been changed to work based on instruction counters, and is such more precise (longer basic blocks are compiled earlier). This also breaks the old detection loop safety mechanism and causes Linux to sometimes loop forever on "calibrating delay loop", so JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
2018-09-18 01:34:10 +02:00
{ opcode: 0xE9, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, no_next_instruction: 1, os: 1, imm1632: 1, custom: 1, skip: 1, },
New block analysis, generation of state machine with multiple basic blocks This commit consists of three components: 1. A new generated x86-parser that analyses instructions. For now, it only detects the control flow of an instruction: Whether it is a (conditional) jump, a normal instruction or a basic block boundary 2. A new function, jit_find_basic_blocks, that finds and connects basic blocks using 1. It loosely finds all basic blocks making up a function, i.e. it doesn't follow call or return instructions (but it does follow all near jumps). Different from our previous analysis, it also finds basic blocks in the strict sense that no basic block contains a jump into the middle of another basic block 3. A new code-generating function, jit_generate, that takes the output of 2 as input. It generates a state machine: - Each basic block becomes a case block in a switch-table - Each basic block ends with setting a state variable for the following basic block - The switch-table is inside a while(true) loop, which is terminated by return statements in basic blocks which are leaves Additionally: - Block linking has been removed as it is (mostly) obsoleted by these changes. It may later be reactived for call instructions - The code generator API has been extended to generate the code for the state machine - The iterations of the state machine are limited in order to avoid infinite loops that can't be interrupted
2018-03-21 19:01:32 +01:00
{ opcode: 0xEA, block_boundary: 1, no_next_instruction: 1, os: 1, imm1632: 1, extra_imm16: 1, skip: 1, }, // jmpf
Don't create unnecessary entry points This commit prevents creation of entry points for jumps within the same page. In interpreted mode, execution is continued on these kinds of jumps. Since this prevents the old hotness detection from working efficiently, hotness detection has also been changed to work based on instruction counters, and is such more precise (longer basic blocks are compiled earlier). This also breaks the old detection loop safety mechanism and causes Linux to sometimes loop forever on "calibrating delay loop", so JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
2018-09-18 01:34:10 +02:00
{ opcode: 0xEB, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, no_next_instruction: 1, os: 1, imm8s: 1, custom: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Multiple jit block entry points - introduce multiple entry points per compiled wasm module, by passing the initial state to the generated function. - continue analysing and compiling after instructions that change eip, but will eventually return to the next instruction, in particular CALLs (and generate an entry point for the following instruction) This commit is incomplete in the sense that the container will crash after some time of execution, as wasm table indices are never freed
2018-04-23 22:50:38 +02:00
{ opcode: 0xEC, block_boundary: 1, skip: 1, }, // in
gen: s/jump/block_boundary/
2018-04-02 09:50:03 +02:00
{ opcode: 0xED, block_boundary: 1, os: 1, skip: 1, },
Multiple jit block entry points - introduce multiple entry points per compiled wasm module, by passing the initial state to the generated function. - continue analysing and compiling after instructions that change eip, but will eventually return to the next instruction, in particular CALLs (and generate an entry point for the following instruction) This commit is incomplete in the sense that the container will crash after some time of execution, as wasm table indices are never freed
2018-04-23 22:50:38 +02:00
{ opcode: 0xEE, block_boundary: 1, skip: 1, }, // out
gen: s/jump/block_boundary/
2018-04-02 09:50:03 +02:00
{ opcode: 0xEF, block_boundary: 1, os: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0xF0, prefix: 1, },
{ opcode: 0xF1, skip: 1, },
{ opcode: 0xF2, prefix: 1, },
{ opcode: 0xF3, prefix: 1, },
Multiple jit block entry points - introduce multiple entry points per compiled wasm module, by passing the initial state to the generated function. - continue analysing and compiling after instructions that change eip, but will eventually return to the next instruction, in particular CALLs (and generate an entry point for the following instruction) This commit is incomplete in the sense that the container will crash after some time of execution, as wasm table indices are never freed
2018-04-23 22:50:38 +02:00
{ opcode: 0xF4, block_boundary: 1, no_next_instruction: 1, skip: 1, }, // hlt
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xF5, },
{ opcode: 0xF6, e: 1, fixed_g: 0, imm8: 1, custom: 1 },
{ opcode: 0xF6, e: 1, fixed_g: 1, imm8: 1, custom: 1 },
{ opcode: 0xF6, e: 1, fixed_g: 2, },
{ opcode: 0xF6, e: 1, fixed_g: 3, },
{ opcode: 0xF6, e: 1, fixed_g: 4, mask_flags: af | zf, },
{ opcode: 0xF6, e: 1, fixed_g: 5, mask_flags: af | zf, },
Remove use of cpu exceptions for divisions
2018-07-19 23:21:01 +02:00
{ opcode: 0xF6, e: 1, fixed_g: 6, block_boundary: 1, }, // div/idiv: Not a block boundary, but doesn't use control flow exceptions
{ opcode: 0xF6, e: 1, fixed_g: 7, block_boundary: 1, },
Port jit to Rust The following files and functions were ported: - jit.c - codegen.c - _jit functions in instructions*.c and misc_instr.c - generate_{analyzer,jit}.js (produces Rust code) - jit_* from cpu.c And the following data structures: - hot_code_addresses - wasm_table_index_free_list - entry_points - jit_cache_array - page_first_jit_cache_entry Other miscellaneous changes: - Page is an abstract type - Addresses, locals and bitflags are unsigned - Make the number of entry points a growable type - Avoid use of global state wherever possible - Delete string packing - Make CachedStateFlags abstract - Make AnalysisType product type - Make BasicBlockType product type - Restore opcode assertion - Set opt-level=2 in debug mode (for test performance) - Delete JIT_ALWAYS instrumentation (now possible via api) - Refactor generate_analyzer.js - Refactor generate_jit.js
2018-07-03 17:28:33 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 0, imm1632: 1, custom: 1 },
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 1, imm1632: 1, custom: 1 },
Code generation for missing memory operations (8-bit shifts, shrd, shld, xadd)
2018-12-06 22:48:09 +01:00
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 2, custom: 1 },
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 3, custom: 1 },
Codegen for mul32 + custom mul/imul (F7_[45])
2019-01-07 15:16:33 +01:00
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 4, mask_flags: zf | af, custom: 1 },
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 5, mask_flags: zf | af, custom: 1 },
Jit DIV/IDIV
2021-01-01 02:14:30 +01:00
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 6, custom: 1 },
{ opcode: 0xF7, os: 1, e: 1, fixed_g: 7, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit clc/stc (F8/F9)
2021-01-01 02:14:32 +01:00
{ opcode: 0xF8, custom: 1 },
{ opcode: 0xF9, custom: 1 },
Custom codegen for absolute cli (FA)
2021-01-01 02:14:28 +01:00
{ opcode: 0xFA, custom: 1, skip: 1 },
Fix: Inhibit interrupts for one instruction after STI (fixes ReactOS)
2021-01-01 02:14:30 +01:00
// STI: Note: Has special handling in jit in order to call handle_irqs safely
{ opcode: 0xFB, custom: 1, custom_sti: 1, skip: 1, },
Make std/cld custom (FC/FD), remove unused unguarded_register and no_register properties from x86 table
2021-01-01 02:14:28 +01:00
{ opcode: 0xFC, custom: 1, },
{ opcode: 0xFD, custom: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit inc8/dec8
2021-01-01 02:14:32 +01:00
{ opcode: 0xFE, e: 1, fixed_g: 0, custom: 1 },
{ opcode: 0xFE, e: 1, fixed_g: 1, custom: 1 },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xFF, os: 1, e: 1, fixed_g: 0, custom: 1, },
{ opcode: 0xFF, os: 1, e: 1, fixed_g: 1, custom: 1, },
Generate direct control flow, using wasm blocks and loops
2021-01-01 02:14:33 +01:00
{ opcode: 0xFF, os: 1, e: 1, fixed_g: 2, custom: 1, block_boundary: 1, absolute_jump: 1, skip: 1, },
gen: s/jump/block_boundary/
2018-04-02 09:50:03 +02:00
{ opcode: 0xFF, os: 1, e: 1, fixed_g: 3, block_boundary: 1, skip: 1, },
Generate direct control flow, using wasm blocks and loops
2021-01-01 02:14:33 +01:00
{ opcode: 0xFF, os: 1, e: 1, fixed_g: 4, custom: 1, block_boundary: 1, absolute_jump: 1, no_next_instruction: 1, skip: 1, },
New block analysis, generation of state machine with multiple basic blocks This commit consists of three components: 1. A new generated x86-parser that analyses instructions. For now, it only detects the control flow of an instruction: Whether it is a (conditional) jump, a normal instruction or a basic block boundary 2. A new function, jit_find_basic_blocks, that finds and connects basic blocks using 1. It loosely finds all basic blocks making up a function, i.e. it doesn't follow call or return instructions (but it does follow all near jumps). Different from our previous analysis, it also finds basic blocks in the strict sense that no basic block contains a jump into the middle of another basic block 3. A new code-generating function, jit_generate, that takes the output of 2 as input. It generates a state machine: - Each basic block becomes a case block in a switch-table - Each basic block ends with setting a state variable for the following basic block - The switch-table is inside a while(true) loop, which is terminated by return statements in basic blocks which are leaves Additionally: - Block linking has been removed as it is (mostly) obsoleted by these changes. It may later be reactived for call instructions - The code generator API has been extended to generate the code for the state machine - The iterations of the state machine are limited in order to avoid infinite loops that can't be interrupted
2018-03-21 19:01:32 +01:00
{ opcode: 0xFF, os: 1, e: 1, fixed_g: 5, block_boundary: 1, no_next_instruction: 1, skip: 1, },
Apply stack_size_32 cache optimization to push r/m
2018-02-23 08:44:49 +01:00
{ opcode: 0xFF, custom: 1, os: 1, e: 1, fixed_g: 6, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Don't use is_osize_32 in instructions
2021-01-01 02:14:30 +01:00
{ opcode: 0x0F00, fixed_g: 0, e: 1, skip: 1, block_boundary: 1, os: 1, }, // sldt, ...
{ opcode: 0x0F00, fixed_g: 1, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F00, fixed_g: 2, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F00, fixed_g: 3, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F00, fixed_g: 4, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F00, fixed_g: 5, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F01, fixed_g: 0, e: 1, skip: 1, block_boundary: 1, os: 1, }, // sgdt, ...
{ opcode: 0x0F01, fixed_g: 1, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F01, fixed_g: 2, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F01, fixed_g: 3, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F01, fixed_g: 4, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F01, fixed_g: 6, e: 1, skip: 1, block_boundary: 1, os: 1, },
{ opcode: 0x0F01, fixed_g: 7, e: 1, skip: 1, block_boundary: 1, os: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0F02, os: 1, e: 1, skip: 1, block_boundary: 1, }, // lar
{ opcode: 0x0F03, os: 1, e: 1, skip: 1, block_boundary: 1, }, // lsl
{ opcode: 0x0F04, skip: 1, block_boundary: 1, },
{ opcode: 0x0F05, skip: 1, block_boundary: 1, },
Remove use of cpu exceptions for trigger_gp for instructions
2018-07-21 23:52:30 +02:00
{ opcode: 0x0F06, skip: 1, block_boundary: 1, }, // clts
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0F07, skip: 1, block_boundary: 1, },
{ opcode: 0x0F08, skip: 1, block_boundary: 1, },
Remove use of cpu exceptions for trigger_gp for instructions
2018-07-21 23:52:30 +02:00
{ opcode: 0x0F09, skip: 1, block_boundary: 1, }, // wbinvd
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0F0A, skip: 1, block_boundary: 1, },
Mark ud2 instruction as block boundary
2018-05-31 22:15:31 +02:00
// ud2
// Technically has a next instruction, but Linux uses this for assertions
// and embeds the assertion message after this instruction, which is likely
// the most common use case of ud2
{ opcode: 0x0F0B, skip: 1, block_boundary: 1, no_next_instruction: 1, },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0F0C, skip: 1, block_boundary: 1, },
{ opcode: 0x0F0D, skip: 1, block_boundary: 1, },
{ opcode: 0x0F0E, skip: 1, block_boundary: 1, },
{ opcode: 0x0F0F, skip: 1, block_boundary: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Also generate nop for prefetch instruction
2018-12-08 22:44:46 +01:00
{ opcode: 0x0F18, e: 1, custom: 1 },
Dead
2021-01-01 02:14:30 +01:00
{ opcode: 0x0F19, custom: 1, e: 1, },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0F1A, skip: 1, block_boundary: 1, },
{ opcode: 0x0F1B, skip: 1, block_boundary: 1, },
Dead
2021-01-01 02:14:30 +01:00
{ opcode: 0x0F1C, custom: 1, e: 1, },
{ opcode: 0x0F1D, custom: 1, e: 1, },
{ opcode: 0x0F1E, custom: 1, e: 1, },
{ opcode: 0x0F1F, custom: 1, e: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of cpu exceptions for trigger_gp for instructions
2018-07-21 23:52:30 +02:00
{ opcode: 0x0F20, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1, }, // mov reg, creg
{ opcode: 0x0F21, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1, }, // mov reg, dreg
{ opcode: 0x0F22, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1, }, // mov creg, reg
{ opcode: 0x0F23, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1, }, // mov dreg, reg
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0F24, skip: 1, block_boundary: 1, },
{ opcode: 0x0F25, skip: 1, block_boundary: 1, },
{ opcode: 0x0F26, skip: 1, block_boundary: 1, },
{ opcode: 0x0F27, skip: 1, block_boundary: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of cpu exceptions for trigger_gp for instructions
2018-07-21 23:52:30 +02:00
{ opcode: 0x0F30, skip: 1, block_boundary: 1, }, // wrmsr
jit RDTSC
2021-01-01 02:14:31 +01:00
{ opcode: 0x0F31, skip: 1, custom: 1, }, // rdtsc
Remove use of cpu exceptions for trigger_gp for instructions
2018-07-21 23:52:30 +02:00
{ opcode: 0x0F32, skip: 1, block_boundary: 1, }, // rdmsr
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ opcode: 0x0F33, skip: 1, block_boundary: 1, }, // rdpmc
Multiple jit block entry points - introduce multiple entry points per compiled wasm module, by passing the initial state to the generated function. - continue analysing and compiling after instructions that change eip, but will eventually return to the next instruction, in particular CALLs (and generate an entry point for the following instruction) This commit is incomplete in the sense that the container will crash after some time of execution, as wasm table indices are never freed
2018-04-23 22:50:38 +02:00
{ opcode: 0x0F34, skip: 1, block_boundary: 1, no_next_instruction: 1, }, // sysenter
New block analysis, generation of state machine with multiple basic blocks This commit consists of three components: 1. A new generated x86-parser that analyses instructions. For now, it only detects the control flow of an instruction: Whether it is a (conditional) jump, a normal instruction or a basic block boundary 2. A new function, jit_find_basic_blocks, that finds and connects basic blocks using 1. It loosely finds all basic blocks making up a function, i.e. it doesn't follow call or return instructions (but it does follow all near jumps). Different from our previous analysis, it also finds basic blocks in the strict sense that no basic block contains a jump into the middle of another basic block 3. A new code-generating function, jit_generate, that takes the output of 2 as input. It generates a state machine: - Each basic block becomes a case block in a switch-table - Each basic block ends with setting a state variable for the following basic block - The switch-table is inside a while(true) loop, which is terminated by return statements in basic blocks which are leaves Additionally: - Block linking has been removed as it is (mostly) obsoleted by these changes. It may later be reactived for call instructions - The code generator API has been extended to generate the code for the state machine - The iterations of the state machine are limited in order to avoid infinite loops that can't be interrupted
2018-03-21 19:01:32 +01:00
{ opcode: 0x0F35, skip: 1, block_boundary: 1, no_next_instruction: 1, }, // sysexit
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ opcode: 0x0F36, skip: 1, block_boundary: 1, }, // ud
{ opcode: 0x0F37, skip: 1, block_boundary: 1, }, // getsec
// sse3+
{ opcode: 0x0F38, skip: 1, block_boundary: 1, },
{ opcode: 0x0F39, skip: 1, block_boundary: 1, },
{ opcode: 0x0F3A, skip: 1, block_boundary: 1, },
{ opcode: 0x0F3B, skip: 1, block_boundary: 1, },
{ opcode: 0x0F3C, skip: 1, block_boundary: 1, },
{ opcode: 0x0F3D, skip: 1, block_boundary: 1, },
{ opcode: 0x0F3E, skip: 1, block_boundary: 1, },
{ opcode: 0x0F3F, skip: 1, block_boundary: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0F40, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F41, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F42, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F43, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F44, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F45, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F46, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F47, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F48, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F49, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F4A, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F4B, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F4C, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F4D, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F4E, e: 1, os: 1, custom: 1, },
{ opcode: 0x0F4F, e: 1, os: 1, custom: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Don't create unnecessary entry points This commit prevents creation of entry points for jumps within the same page. In interpreted mode, execution is continued on these kinds of jumps. Since this prevents the old hotness detection from working efficiently, hotness detection has also been changed to work based on instruction counters, and is such more precise (longer basic blocks are compiled earlier). This also breaks the old detection loop safety mechanism and causes Linux to sometimes loop forever on "calibrating delay loop", so JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
2018-09-18 01:34:10 +02:00
{ opcode: 0x0F80, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F81, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F82, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F83, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F84, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F85, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F86, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F87, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F88, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F89, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F8A, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F8B, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F8C, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F8D, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F8E, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
{ opcode: 0x0F8F, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0F90, e: 1, custom: 1, },
{ opcode: 0x0F91, e: 1, custom: 1, },
{ opcode: 0x0F92, e: 1, custom: 1, },
{ opcode: 0x0F93, e: 1, custom: 1, },
{ opcode: 0x0F94, e: 1, custom: 1, },
{ opcode: 0x0F95, e: 1, custom: 1, },
{ opcode: 0x0F96, e: 1, custom: 1, },
{ opcode: 0x0F97, e: 1, custom: 1, },
{ opcode: 0x0F98, e: 1, custom: 1, },
{ opcode: 0x0F99, e: 1, custom: 1, },
{ opcode: 0x0F9A, e: 1, custom: 1, },
{ opcode: 0x0F9B, e: 1, custom: 1, },
{ opcode: 0x0F9C, e: 1, custom: 1, },
{ opcode: 0x0F9D, e: 1, custom: 1, },
{ opcode: 0x0F9E, e: 1, custom: 1, },
{ opcode: 0x0F9F, e: 1, custom: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8)
2021-01-01 02:14:28 +01:00
{ opcode: 0x0FA0, os: 1, custom: 1, },
Remove use of cpu exceptions for trigger_ss (partially including switch_seg)
2018-07-20 22:39:06 +02:00
{ opcode: 0x0FA1, os: 1, block_boundary: 1, skip: 1, }, // pop fs: block_boundary since it uses non-raising cpu exceptions
Fix jit in presence of new page fault handling Makes the following a block boundary: - push - Any non-custom instruction that uses modrm encoding - Any sse/fpu instruction This commit affects performance negatively. In order to fix this, the above instructions need to be implemented using custom code generators for the memory access.
2018-08-16 21:37:10 +02:00
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
{ opcode: 0x0FA2, skip: 1, },
Custom codegen for push sreg (06/0E/16/1E/0FA0/0FA8)
2021-01-01 02:14:28 +01:00
{ opcode: 0x0FA8, os: 1, custom: 1, },
Remove use of cpu exceptions for trigger_ss (partially including switch_seg)
2018-07-20 22:39:06 +02:00
{ opcode: 0x0FA9, os: 1, block_boundary: 1, skip: 1, }, // pop gs
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit bts/btr/btc
2021-01-01 02:14:33 +01:00
{ opcode: 0x0FA3, os: 1, e: 1, custom: 1, skip_mem: 1 }, // bt (can also index memory, but not supported by test right now)
{ opcode: 0x0FAB, os: 1, e: 1, custom: 1, skip_mem: 1 },
{ opcode: 0x0FB3, os: 1, e: 1, custom: 1, skip_mem: 1 },
{ opcode: 0x0FBB, os: 1, e: 1, custom: 1, skip_mem: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Jit BT
2021-01-01 02:14:30 +01:00
{ opcode: 0x0FBA, os: 1, e: 1, fixed_g: 4, imm8: 1, custom: 1 }, // bt
jit bts/btr/btc
2021-01-01 02:14:33 +01:00
{ opcode: 0x0FBA, os: 1, e: 1, fixed_g: 5, imm8: 1, custom: 1 },
{ opcode: 0x0FBA, os: 1, e: 1, fixed_g: 6, imm8: 1, custom: 1 },
{ opcode: 0x0FBA, os: 1, e: 1, fixed_g: 7, imm8: 1, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
partially jit bsf/bsr
2021-01-01 02:14:31 +01:00
{ opcode: 0x0FBC, os: 1, e: 1, mask_flags: af, custom: 1 }, // bsf
{ opcode: 0x0FBD, os: 1, e: 1, mask_flags: af, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
// note: overflow flag only undefined if shift is > 1
Code generation for missing memory operations (8-bit shifts, shrd, shld, xadd)
2018-12-06 22:48:09 +01:00
{ opcode: 0x0FA4, os: 1, e: 1, custom: 1, imm8: 1, mask_flags: af | of, }, // shld
{ opcode: 0x0FA5, os: 1, e: 1, custom: 1, mask_flags: af | of, },
{ opcode: 0x0FAC, os: 1, e: 1, custom: 1, imm8: 1, mask_flags: af | of, },
{ opcode: 0x0FAD, os: 1, e: 1, custom: 1, mask_flags: af | of, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FA6, skip: 1, block_boundary: 1, }, // ud
{ opcode: 0x0FA7, skip: 1, block_boundary: 1, }, // ud
x86 table: Add remaining 0f instructions, simplify gen scripts
2018-04-14 00:39:50 +02:00
{ opcode: 0x0FAA, skip: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FAE, e: 1, fixed_g: 0, reg_ud: 1, task_switch_test: 1, skip: 1, block_boundary: 1, }, // fxsave
{ opcode: 0x0FAE, e: 1, fixed_g: 1, reg_ud: 1, task_switch_test: 1, skip: 1, block_boundary: 1, }, // fxrstor
{ opcode: 0x0FAE, e: 1, fixed_g: 2, reg_ud: 1, sse: 1, skip: 1, block_boundary: 1, }, // ldmxcsr
{ opcode: 0x0FAE, e: 1, fixed_g: 3, reg_ud: 1, sse: 1, skip: 1, block_boundary: 1, }, // stmxcsr
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FAE, e: 1, fixed_g: 4, reg_ud: 1, skip: 1, block_boundary: 1, }, // xsave (mem, not implemented)
lfence doesn't need to be a block boundary
2021-01-01 02:14:31 +01:00
{ opcode: 0x0FAE, e: 1, fixed_g: 5, skip: 1, custom: 1 }, // lfence (reg, only 0), xrstor (mem, not implemented)
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FAE, e: 1, fixed_g: 6, skip: 1, block_boundary: 1, }, // mfence (reg, only 0), xsaveopt (mem, not implemented)
{ opcode: 0x0FAE, e: 1, fixed_g: 7, skip: 1, block_boundary: 1, }, // sfence (reg, only 0), clflush (mem)
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0FAF, os: 1, e: 1, mask_flags: af | zf, custom: 1, }, // imul
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0FB0, e: 1 }, // cmxchg
Custom codegen for absolute cmpxchg (0FB1)
2021-01-01 02:14:28 +01:00
{ opcode: 0x0FB1, os: 1, e: 1, custom: 1 },
jit cmpxchg8b
2021-01-01 02:14:32 +01:00
{ opcode: 0x0FC7, e: 1, fixed_g: 1, os: 1, reg_ud: 1, custom: 1 }, // cmpxchg8b (memory)
Don't use is_osize_32 in instructions
2021-01-01 02:14:30 +01:00
{ opcode: 0x0FC7, e: 1, fixed_g: 6, os: 1, mem_ud: 1, skip: 1, }, // rdrand
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of cpu exceptions for trigger_ss (partially including switch_seg)
2018-07-20 22:39:06 +02:00
{ opcode: 0x0FB2, block_boundary: 1, os: 1, e: 1, skip: 1, }, // lss
{ opcode: 0x0FB4, block_boundary: 1, os: 1, e: 1, skip: 1, }, // lfs
{ opcode: 0x0FB5, block_boundary: 1, os: 1, e: 1, skip: 1, }, // lgs
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0FB6, os: 1, e: 1, custom: 1 }, // movzx
jit 0x0FB7
2018-09-03 19:35:48 +02:00
{ opcode: 0x0FB7, os: 1, e: 1, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Partially jit popcnt
2021-01-01 02:14:31 +01:00
{ opcode: 0xF30FB8, os: 1, e: 1, custom: 1 }, // popcnt
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FB8, os: 1, e: 1, block_boundary: 1, }, // ud
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FB9, block_boundary: 1, }, // ud2
x86 table: Add remaining 0f instructions, simplify gen scripts
2018-04-14 00:39:50 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0FBE, os: 1, e: 1, custom: 1 }, // movsx
jit 0x0FBF
2018-09-03 19:47:51 +02:00
{ opcode: 0x0FBF, os: 1, e: 1, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x0FC0, e: 1, }, // xadd
Custom codegen for xadd (0FC1)
2019-01-07 15:35:57 +01:00
{ opcode: 0x0FC1, os: 1, e: 1, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit bswap
2021-01-01 02:14:33 +01:00
{ opcode: 0x0FC8, custom: 1 }, // bswap
{ opcode: 0x0FC9, custom: 1 },
{ opcode: 0x0FCA, custom: 1 },
{ opcode: 0x0FCB, custom: 1 },
{ opcode: 0x0FCC, custom: 1 },
{ opcode: 0x0FCD, custom: 1 },
{ opcode: 0x0FCE, custom: 1 },
{ opcode: 0x0FCF, custom: 1 },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
// mmx, sse
sse: Implement 0F52/rcpps (#57)
2018-08-28 19:27:25 +02:00
// - skipped or missing are sse3+
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F10, e: 1, custom: 1 },
jit f30f10/movss
2021-01-01 02:14:34 +01:00
{ sse: 1, opcode: 0xF30F10, e: 1, custom: 1 },
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F10, e: 1, custom: 1 },
jit movsd f20f10
2021-01-01 02:14:33 +01:00
{ sse: 1, opcode: 0xF20F10, e: 1, custom: 1 },
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F11, e: 1, custom: 1 },
jit f30f11/movss
2021-01-01 02:14:34 +01:00
{ sse: 1, opcode: 0xF30F11, e: 1, custom: 1 },
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F11, e: 1, custom: 1 },
jit movsd f20f11
2021-01-01 02:14:33 +01:00
{ sse: 1, opcode: 0xF20F11, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
{ sse: 1, opcode: 0x0F12, e: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x660F12, reg_ud: 1, e: 1 },
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ sse: 1, opcode: 0xF20F12, e: 1, skip: 1, block_boundary: 1, }, // sse3
{ sse: 1, opcode: 0xF30F12, e: 1, skip: 1, block_boundary: 1, }, // sse3
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0F13, reg_ud: 1, e: 1 },
{ sse: 1, opcode: 0x660F13, reg_ud: 1, e: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
{ sse: 1, opcode: 0x0F14, e: 1 },
{ sse: 1, opcode: 0x660F14, e: 1 },
{ sse: 1, opcode: 0x0F15, e: 1 },
{ sse: 1, opcode: 0x660F15, e: 1 },
{ sse: 1, opcode: 0x0F16, e: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x660F16, reg_ud: 1, e: 1 },
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ sse: 1, opcode: 0xF30F16, skip: 1, e: 1, block_boundary: 1, }, // sse3
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0F17, reg_ud: 1, e: 1 },
{ sse: 1, opcode: 0x660F17, reg_ud: 1, e: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F28, e: 1, custom: 1 },
{ sse: 1, opcode: 0x660F28, e: 1, custom: 1 },
Support for gen_safe_write128 and code generation for MOVAPS/MOVDQA (0F29/660F7F)
2018-12-06 23:44:13 +01:00
{ sse: 1, opcode: 0x0F29, e: 1, custom: 1 },
Custom codegen for more sse move aliases (660F29/660F6F/F30F7F)
2019-01-07 15:51:28 +01:00
{ sse: 1, opcode: 0x660F29, e: 1, custom: 1 },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0x0F2A, e: 1, },
{ sse: 1, opcode: 0x660F2A, e: 1, },
{ sse: 1, opcode: 0xF20F2A, e: 1, },
{ sse: 1, opcode: 0xF30F2A, e: 1, },
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F2B, reg_ud: 1, e: 1, custom: 1 },
{ sse: 1, opcode: 0x660F2B, reg_ud: 1, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
sse: Implement 0F2C/0F2D/CVTT[PS][SD]2[SP]I (#57)
2018-08-28 19:43:06 +02:00
{ sse: 1, opcode: 0x0F2C, e: 1, },
{ sse: 1, opcode: 0x660F2C, e: 1, },
partially jit some sse conversion instructions
2021-01-01 02:14:33 +01:00
{ sse: 1, opcode: 0xF20F2C, e: 1, custom: 1 },
{ sse: 1, opcode: 0xF30F2C, e: 1, custom: 1 },
sse: Implement 0F2C/0F2D/CVTT[PS][SD]2[SP]I (#57)
2018-08-28 19:43:06 +02:00
{ sse: 1, opcode: 0x0F2D, e: 1, },
{ sse: 1, opcode: 0x660F2D, e: 1, },
partially jit some sse conversion instructions
2021-01-01 02:14:33 +01:00
{ sse: 1, opcode: 0xF20F2D, e: 1, custom: 1 },
{ sse: 1, opcode: 0xF30F2D, e: 1, custom: 1 },
Implement cvtsd2si (#57)
2018-08-01 22:37:22 +02:00
sse: Implement 0F2E/0F2F/u?comis[sd] (#57)
2018-08-28 19:34:44 +02:00
{ sse: 1, opcode: 0x0F2E, e: 1 },
{ sse: 1, opcode: 0x660F2E, e: 1 },
{ sse: 1, opcode: 0x0F2F, e: 1 },
{ sse: 1, opcode: 0x660F2F, e: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0F50, mem_ud: 1, e: 1 },
{ sse: 1, opcode: 0x660F50, mem_ud: 1, e: 1 },
Add sqrt{p,s}{d,s} instructions (#57)
2018-07-31 00:48:47 +02:00
{ sse: 1, opcode: 0x0F51, e: 1 },
{ sse: 1, opcode: 0x660F51, e: 1 },
{ sse: 1, opcode: 0xF20F51, e: 1 },
{ sse: 1, opcode: 0xF30F51, e: 1 },
sse: Implement 0F52/rcpps (#57)
2018-08-28 19:27:25 +02:00
// approximation of 1/sqrt(x). Skipped because our approximation doesn't match intel's
{ sse: 1, opcode: 0x0F52, e: 1, skip: 1, },
{ sse: 1, opcode: 0xF30F52, e: 1, skip: 1, },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
// reciprocal: approximation of 1/x. Skipped because our approximation doesn't match intel's
{ sse: 1, opcode: 0x0F53, e: 1, skip: 1, },
{ sse: 1, opcode: 0xF30F53, e: 1, skip: 1, },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
{ sse: 1, opcode: 0x0F54, e: 1 },
{ sse: 1, opcode: 0x660F54, e: 1 },
{ sse: 1, opcode: 0x0F55, e: 1 },
{ sse: 1, opcode: 0x660F55, e: 1 },
{ sse: 1, opcode: 0x0F56, e: 1 },
{ sse: 1, opcode: 0x660F56, e: 1 },
{ sse: 1, opcode: 0x0F57, e: 1 },
{ sse: 1, opcode: 0x660F57, e: 1 },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0x0F58, e: 1, },
Implement {min,max,div}{p,s}{s,d} sse instructions (#57)
2018-07-31 01:00:34 +02:00
{ sse: 1, opcode: 0x660F58, e: 1, },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0xF20F58, e: 1, },
{ sse: 1, opcode: 0xF30F58, e: 1, },
{ sse: 1, opcode: 0x0F59, e: 1, },
Implement {min,max,div}{p,s}{s,d} sse instructions (#57)
2018-07-31 01:00:34 +02:00
{ sse: 1, opcode: 0x660F59, e: 1, },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0xF20F59, e: 1, },
{ sse: 1, opcode: 0xF30F59, e: 1, },
sse: Implement 0F5A/0F5B/CVTT?[SPD][SDQ]2[SPD][SDQ] (#57)
2018-08-28 19:48:05 +02:00
{ sse: 1, opcode: 0x0F5A, e: 1, },
{ sse: 1, opcode: 0x660F5A, e: 1, },
{ sse: 1, opcode: 0xF20F5A, e: 1, },
{ sse: 1, opcode: 0xF30F5A, e: 1, },
{ sse: 1, opcode: 0x0F5B, e: 1, },
{ sse: 1, opcode: 0x660F5B, e: 1, },
// no F2 variant
{ sse: 1, opcode: 0xF30F5B, e: 1, },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0x0F5C, e: 1, },
Implement {min,max,div}{p,s}{s,d} sse instructions (#57)
2018-07-31 01:00:34 +02:00
{ sse: 1, opcode: 0x660F5C, e: 1, },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0xF20F5C, e: 1, },
{ sse: 1, opcode: 0xF30F5C, e: 1, },
Implement {min,max,div}{p,s}{s,d} sse instructions (#57)
2018-07-31 01:00:34 +02:00
{ sse: 1, opcode: 0x0F5D, e: 1, },
{ sse: 1, opcode: 0x660F5D, e: 1, },
{ sse: 1, opcode: 0xF20F5D, e: 1, },
{ sse: 1, opcode: 0xF30F5D, e: 1, },
{ sse: 1, opcode: 0x0F5E, e: 1, },
{ sse: 1, opcode: 0x660F5E, e: 1, },
{ sse: 1, opcode: 0xF20F5E, e: 1, },
{ sse: 1, opcode: 0xF30F5E, e: 1, },
{ sse: 1, opcode: 0x0F5F, e: 1, },
{ sse: 1, opcode: 0x660F5F, e: 1, },
{ sse: 1, opcode: 0xF20F5F, e: 1, },
{ sse: 1, opcode: 0xF30F5F, e: 1, },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F60, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F60, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F61, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F61, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F62, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F62, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F63, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F63, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F64, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F64, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F65, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F65, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F66, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F66, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F67, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F67, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F68, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F68, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F69, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F69, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F6A, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F6A, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F6B, e: 1, custom: 1 },
jit more mmx instructions (0F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F6B, e: 1, custom: 1 },
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F6C, e: 1, custom: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0F6C, e: 1, block_boundary: 1, }, // ud
jit more sse instructions (660F6*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F6D, e: 1, custom: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0F6D, e: 1, block_boundary: 1, }, // ud
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F6E, e: 1, custom: 1 },
jit 0F6E/0F6F mmx movd/movq
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0F6E, e: 1, custom: 1 },
Support for gen_safe_read128 and code generation for MOVDQU (F30F6F)
2018-12-10 16:34:11 +01:00
{ sse: 1, opcode: 0xF30F6F, e: 1, custom: 1 },
Custom codegen for more sse move aliases (660F29/660F6F/F30F7F)
2019-01-07 15:51:28 +01:00
{ sse: 1, opcode: 0x660F6F, e: 1, custom: 1 },
jit 0F6E/0F6F mmx movd/movq
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0F6F, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit pshufw (0F70)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F70, e: 1, imm8: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F70, e: 1, imm8: 1, custom: 1 },
{ sse: 1, opcode: 0xF20F70, e: 1, imm8: 1, custom: 1 },
{ sse: 1, opcode: 0xF30F70, e: 1, imm8: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F71, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F71, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F71, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F71, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F71, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F71, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F72, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F72, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F72, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F72, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F72, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F72, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
jit one more mmx instruction
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0F73, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F73, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
{ sse: 1, opcode: 0x660F73, e: 1, fixed_g: 3, imm8: 1, mem_ud: 1, custom: 1 },
jit mmx shift instructions (0F71/0F72/0F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0F73, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
jit sse shift instructions (660F71/660F72/660F73)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660F73, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
{ sse: 1, opcode: 0x660F73, e: 1, fixed_g: 7, imm8: 1, mem_ud: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
{ sse: 1, opcode: 0x0F74, e: 1, },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F74, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
{ sse: 1, opcode: 0x0F75, e: 1, },
{ sse: 1, opcode: 0x660F75, e: 1, },
{ sse: 1, opcode: 0x0F76, e: 1, },
{ sse: 1, opcode: 0x660F76, e: 1, },
Enable fpu instructions in nasm tests
2018-12-03 20:42:24 +01:00
{ sse: 1, opcode: 0x0F77, skip: 1 }, // emms (skip as it breaks gdb printing of float registers)
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Add missing sse3 instruction and add note on others
2018-07-26 23:06:50 +02:00
// vmx instructions
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ opcode: 0x0F78, skip: 1, block_boundary: 1, },
{ opcode: 0x0F79, skip: 1, block_boundary: 1, },
Add missing sse3 instruction and add note on others
2018-07-26 23:06:50 +02:00
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ opcode: 0x0F7A, skip: 1, block_boundary: 1, }, // ud
{ opcode: 0x0F7B, skip: 1, block_boundary: 1, }, // ud
{ sse: 1, opcode: 0x0F7C, skip: 1, block_boundary: 1, }, // sse3
{ sse: 1, opcode: 0x0F7D, skip: 1, block_boundary: 1, }, // sse3
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit 0F7E/0F7F mmx movd/movq
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0F7E, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660F7E, e: 1, custom: 1 },
{ sse: 1, opcode: 0xF30F7E, e: 1, custom: 1 },
jit 0F7E/0F7F mmx movd/movq
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0F7F, e: 1, custom: 1 },
Support for gen_safe_write128 and code generation for MOVAPS/MOVDQA (0F29/660F7F)
2018-12-06 23:44:13 +01:00
{ sse: 1, opcode: 0x660F7F, e: 1, custom: 1 },
Custom codegen for more sse move aliases (660F29/660F6F/F30F7F)
2019-01-07 15:51:28 +01:00
{ sse: 1, opcode: 0xF30F7F, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit 0fc2/cmpps 660fc2/cmppd
2021-01-01 02:14:34 +01:00
{ sse: 1, opcode: 0x0FC2, e: 1, imm8: 1, custom: 1 },
{ sse: 1, opcode: 0x660FC2, e: 1, imm8: 1, custom: 1 },
Implement some floating point sse1/sse2 instructions (#57)
2018-07-28 00:24:54 +02:00
{ sse: 1, opcode: 0xF20FC2, e: 1, imm8: 1 },
{ sse: 1, opcode: 0xF30FC2, e: 1, imm8: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit MOVNTI
2021-01-01 02:14:31 +01:00
{ opcode: 0x0FC3, e: 1, custom: 1, reg_ud: 1, }, // movnti: Uses normal registers, hence not marked as sse
Add missing sse3 instruction and add note on others
2018-07-26 23:06:50 +02:00
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
{ sse: 1, opcode: 0x0FC4, e: 1, imm8: 1 },
{ sse: 1, opcode: 0x660FC4, e: 1, imm8: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0FC5, e: 1, mem_ud: 1, imm8: 1 },
{ sse: 1, opcode: 0x660FC5, e: 1, mem_ud: 1, imm8: 1, },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit 0fc6/shufps
2021-01-01 02:14:34 +01:00
{ sse: 1, opcode: 0x0FC6, e: 1, imm8: 1, custom: 1 },
jit 660fc6/shufpd
2021-01-01 02:14:34 +01:00
{ sse: 1, opcode: 0x660FC6, e: 1, imm8: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ sse: 1, opcode: 0x0FD0, skip: 1, block_boundary: 1, }, // sse3
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD1, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FD1, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD2, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FD2, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD3, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FD3, e: 1, custom: 1 },
jit some mmx instructions
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0FD4, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FD4, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD5, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FD5, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FD6, e: 1, custom: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0xF20FD6, mem_ud: 1, e: 1 },
{ sse: 1, opcode: 0xF30FD6, mem_ud: 1, e: 1 },
{ sse: 1, opcode: 0x0FD6, e: 1, block_boundary: 1, }, // ud
jit pmovmsk (0fd7/660fd7)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD7, e: 1, mem_ud: 1, custom: 1 },
{ sse: 1, opcode: 0x660FD7, e: 1, mem_ud: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD8, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FD8, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FD9, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FD9, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FDA, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FDA, e: 1, custom: 1 },
jit some mmx instructions
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0FDB, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FDB, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FDC, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FDC, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FDD, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FDD, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FDE, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FDE, e: 1, custom: 1 },
jit more mmx instructions (0FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FDF, e: 1, custom: 1 },
jit more sse instructions (660FD*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FDF, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE0, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE0, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE1, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE1, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE2, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE2, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE3, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE3, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE4, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FE4, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE5, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE5, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE6, e: 1, custom: 1 },
{ sse: 1, opcode: 0xF20FE6, e: 1, custom: 1 },
{ sse: 1, opcode: 0xF30FE6, e: 1, custom: 1 },
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ sse: 1, opcode: 0x0FE6, e: 1, block_boundary: 1, }, // ud
{ sse: 1, opcode: 0x0FE7, e: 1, reg_ud: 1 },
jit sse mov instructions
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE7, e: 1, reg_ud: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE8, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE8, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FE9, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FE9, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FEA, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FEA, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FEB, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FEB, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FEC, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FEC, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FED, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FED, e: 1, custom: 1 },
jit more mmx instructions (0FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FEE, e: 1, custom: 1 },
jit more sse instructions (660FE*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FEE, e: 1, custom: 1 },
jit some mmx instructions
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0FEF, e: 1, custom: 1 },
Custom implementations for several sse instructions - mov dword/qword [mem], xmm - mov xmm, dword/qword [mem] - some arithmetic
2021-01-01 02:14:28 +01:00
{ sse: 1, opcode: 0x660FEF, e: 1, custom: 1 },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
Mark unimplemented instructions as block boundaries
2018-08-31 22:29:15 +02:00
{ sse: 1, opcode: 0x0FF0, skip: 1, block_boundary: 1, }, // sse3
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF1, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF1, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF2, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF2, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF3, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF3, e: 1, custom: 1, },
jit some mmx instructions
2021-01-01 02:14:31 +01:00
{ sse: 1, opcode: 0x0FF4, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF4, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF5, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF5, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF6, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF6, e: 1, custom: 1 },
Minor: Update comment for maskmovq and maskmovdqu
2017-12-18 15:57:03 +01:00
// maskmovq (0FF7), maskmovdqu (660FF7) tested manually
// Generated tests don't setup EDI as required (yet)
Make maskmov* custom
2021-01-01 02:14:30 +01:00
{ sse: 1, opcode: 0x0FF7, mem_ud: 1, e: 1, custom: 1, skip: 1, },
{ sse: 1, opcode: 0x660FF7, mem_ud: 1, e: 1, custom: 1, skip: 1, },
Generate code for task_switch_test{,_mmx}, use non-raising exceptions
2018-07-24 22:40:10 +02:00
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF8, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF8, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FF9, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FF9, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FFA, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FFA, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FFB, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FFB, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FFC, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FFC, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FFD, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FFD, e: 1, custom: 1 },
jit more mmx instructions (0FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x0FFE, e: 1, custom: 1 },
jit more sse instructions (660FF*)
2021-01-01 02:14:32 +01:00
{ sse: 1, opcode: 0x660FFE, e: 1, custom: 1 },
x86 table: Add remaining 0f instructions, simplify gen scripts
2018-04-14 00:39:50 +02:00
Remove use of raising cpu exceptions for trigger_ud
2018-07-31 00:12:56 +02:00
{ opcode: 0x0FFF, block_boundary: 1, }, // ud
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
];
for(let i = 0; i < 8; i++)
{
encodings.push.apply(encodings, [
Custom code generation for arith al/ax/eax, imm (group [0123][45CD], A8/A9)
2018-12-18 20:29:30 +01:00
{ opcode: 0x04 | i << 3, custom: 1, imm8: 1, },
{ opcode: 0x05 | i << 3, custom: 1, os: 1, imm1632: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Don't create unnecessary entry points This commit prevents creation of entry points for jumps within the same page. In interpreted mode, execution is continued on these kinds of jumps. Since this prevents the old hotness detection from working efficiently, hotness detection has also been changed to work based on instruction counters, and is such more precise (longer basic blocks are compiled earlier). This also breaks the old detection loop safety mechanism and causes Linux to sometimes loop forever on "calibrating delay loop", so JIT_ALWAYS_USE_LOOP_SAFETY has been set to 1.
2018-09-18 01:34:10 +02:00
{ opcode: 0x70 | i, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, os: 1, imm8s: 1, custom: 1, skip: 1, },
{ opcode: 0x78 | i, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, os: 1, imm8s: 1, custom: 1, skip: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
jit memory access for 8-bit read-modify-write operations with immediate
2018-09-13 18:36:39 +02:00
{ opcode: 0x80, e: 1, fixed_g: i, imm8: 1, custom: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x81, os: 1, e: 1, fixed_g: i, imm1632: 1, custom: 1, },
Remove some unused #[no_mangle]
2021-01-01 02:14:30 +01:00
{ opcode: 0x82, e: 1, fixed_g: i, imm8: 1, custom: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0x83, os: 1, e: 1, fixed_g: i, imm8s: 1, custom: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
Custom code generation for mov reg, imm (B0-BF)
2018-12-14 00:19:27 +01:00
{ opcode: 0xB0 | i, custom: 1, imm8: 1, },
{ opcode: 0xB8 | i, custom: 1, os: 1, imm1632: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
// note: overflow flag only undefined if shift is > 1
// note: the adjust flag is undefined for shifts > 0 and unaffected by rotates
Code generation for missing memory operations (8-bit shifts, shrd, shld, xadd)
2018-12-06 22:48:09 +01:00
{ opcode: 0xC0, e: 1, fixed_g: i, imm8: 1, mask_flags: of | af, custom: 1, },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xC1, os: 1, e: 1, fixed_g: i, imm8: 1, mask_flags: of | af, custom: 1, },
Codegen for 8-bit shifts (D0/D2)
2019-01-07 15:47:02 +01:00
{ opcode: 0xD0, e: 1, fixed_g: i, mask_flags: af, custom: 1 },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xD1, os: 1, e: 1, fixed_g: i, mask_flags: af, custom: 1, },
Codegen for 8-bit shifts (D0/D2)
2019-01-07 15:47:02 +01:00
{ opcode: 0xD2, e: 1, fixed_g: i, mask_flags: of | af, custom: 1 },
Remove non-faulting property of instructions (all instructions are non-faulting)
2018-08-31 22:06:53 +02:00
{ opcode: 0xD3, os: 1, e: 1, fixed_g: i, mask_flags: of | af, custom: 1, },
Squash 2e469796 Minor fab422ef Improve generation of 0f instructions 08ad7fe9 Improved if-else generation 3f81014d Minor: Align test output 4a3a84ef Generate modrm tests 61aa1875 Simplify a6e47954 Generate decoding of immediate operands 435b2c10 Fix warnings e4933042 Add missing immediate operand 3f3810c7 Generate immediate operands for instructions with modrm byte a0aa7b1f Make memory layout in nasm tests clearer 6b8ef212 Remove 'g' property from instruction table (implied by 'e') bf15c58c Remove unused declarations 1e543035 Remove useless `| 0` and `>>> 0` javascriptisms 1ccc5d53 Fix headers 8b40c532 Update qemu tests with changes from qemu ec9b0fb5 Port xchg instructions to C c73613e7 Port virt_boundary_* to C d61d1241 Add headers fd19f22c Make written value in write8 and write16 int32_t 497dcaec Generate read_imm for instructions with a modrm byte 8b7003d6 Generate read_imm8s 0cc75498 Remove read_op 9d716086 Trigger unimplemented_sse for partial sse instructions with prefix 8d5edd03 Remove unimplmented sse c-to-js hack 585d3565 Remove | 0 308124b2 Use int32_t as return value f193f8e1 Use JS version of cvttsd2si for now 12747b97 Generate trigger_ud for missing modrm branches 770f674e Split 0f00 and 0f01 into multiple instructions depending on modrm bits 1cb372a3 Generate decoder for some 0f-prefix instructions cec7bc63 Disable unused parameter warnings in instruction functions 807665b1 Generate read_imm for 0f/jmpcc cdf6eccc Generate modrm decoding for shld 04528429 Create temporary files in /tmp/, not cwd d8f3fbd8 Generate modrm/imm decoding for shld 00ef0942 Generate modrm decoding for bts f531984b Generate modrm decoding for shrd and imul 07569c53 Generate modrm decoding cmpxchg 535ff190 Generate modrm decoding for lfs/lgs/lss 2f8ced8d Generate modrm decoding for btr and btc 95de6c66 Generate modrm decoding for movzx c4d07e7e Generate modrm decoding for bsf and bsr f0985d26 Generate modrm decoding for movsx 4b30937a Generate modrm decoding for xadd a422eb27 Generate modrm decoding for movnti e5501d3c Generate modrm decoding for mov to/from control/debug registers bce11ec5 Generate modrm decoding for lar/lsl 5729a23c Fix access to DR4 and DR5 when cr4.DE is clear 44269a81 Specify immediate size explicitly instead of inferring it 82b2867a Fix STR instruction 98a9cc89 Log failing assertion 6d2f9964 Fix rdtsc 00260694 Log GP exceptions 7916883d Port trigger_ud and trigger_nm to C 36fedae9 Remove unused code e08fabd0 Generate modrm decoding for 0f00 and 0f01 8ae8174d Generate modrm decoding for 0fae and 0fc7 (fxsave, cmpxchg8, etc.) 26168164 Generate modrm+immediate decoding for 0fba (bit test with immediate operand) 6adf7fa7 Simplify create_tests.js (unused prefix call) c77cbdd8 Add comments about the implementation of pop [addr] 4640b4fe Simplify prefix call a81a5497 Don't use var 3ca5d13d Separate call name and arguments in code generator 3191a543 Simplify other prefix call (8D/lea) 5185080e Update generated code (stylistic changes and #ud generation) 93b51d41 Remove unused wasm externals e4af0a7f Avoid hardcoding special cases in code generator (lea, pop r/m) 654a2b49 Avoid hardcoding special cases in code generator (enter/jumpf/callf) fd1a1e86 Commit generated code (only stylistic changes) 7310fd1a Simplify code generator by merging code for with and without 0f prefix e7eae4af Simplify code generator by merging code for immediate operands 00fafd8a Improve assertions db084e49 Simplify code generator (modrm if-else) 0a0e4c9e Improve code generation of switch-case ce292795 Clarify some comments 37cf33fa Generate code in if/else blocks cbcc33fc Document naming scheme e30b97eb Generate modrm decoding for 0f12 (sse) instruction 24b72c2f movlpd cannot be used for register-to-register moves 72d72995 Generate modrm decoding for 0f13 (sse) instruction and disable register-to-register moving 75d76fbb Generate modrm decoding for 0f14 (sse) instruction ac8965a7 Generate modrm decoding for 0f28-0f2b (movap, movntp) e919d33e Generate modrm decoding for cvttsd2si 5f2ca2b4 Generate modrm decoding for andp and xorp c8d1c6de Generate modrm decoding for 0f60-0f70 (sse instructions) ae4ed46d Add multi-byte nop and prefetch to nasm test, generate modrm decoding 718a1acf Print qemu test error message more useful d1ecc37e Generate modrm decoding for 0f70-0f80 (sse instructions) 6a7219a5 Generate modrm decoding for popcnt 25278217 Generate modrm decoding for 0f71-0f73 (sse shift with immediate byte) ed1ec81b Generate modrm decoding for the remaining sse instructions (0fc0-0fff) 42bc5a6f Use 64-bit multiplication for native code dda3fb39 Remove old modrm-decoding functions 717975ef Move register access functions to cpu.c aee8138f Remove read_op, read_sib, read_op0F, read_disp f31317f2 Rename xmm/mmx register access functions a525e70b Remove 32-bit access to reg_xmm and reg_mmx c803eabc Rename s8/s16/s32 to i8/i16/i32 9fbd2ddf Don't use uninitialised structs 942eb4f7 Use 64-bit load for mmx registers and assert reg64 and reg128 size f94ec612 Use 64-bit writes for write_xmm64 08022de9 Use more efficient method for some 128-bit stores 9d5b084c Make timestamp counter unsigned 2ef388b3 Pass 64-bit value to safe_write64 4cb2b1be Optimise safe_write64 and safe_write128 b0ab09fb Implement psllq (660ff3) 9935e5d4 Optimise safe_read64s and safe_read128s af9ea1cc Log cl in cpuid only if relevant be5fe23e Add multi-op cache (disabled by default through ENABLE_JIT macro) and JIT paging test (similar to QEMU test). aa2f286e Don't initialise group_dirtiness with 1 as it increases the binary size significantly b8e14ed9 Remove unused reg_xmm32s bc726e03 Implement dbg_log for native code with format characters 'd' and 'x' 454039d6 Fix store task register 63a4b349 Remove unnecessary parens and clean up some log statements 4cc96814 Add logop and dbg_trace imports 7940655d Only inhibit interrupts if the interrupt flag was 0 in STI 876c68a7 Split create_tests into create_tests and generate_interpreter aa82499f Move detection of string instructions to x86_table f3840ec2 Move C ast to separate file 90400703 Skip tests for lfence/mfence/sfence, clarify their encoding 4a9d8204 elf: Hide log messages when log level is zero a601c526 Allow setting log level via settings 8a624453 Add cpu_exception_hook to debug builds f9e335bf Nasm: Test exceptions 599ad088 logop: Format instruction pointer as unsigned f95cf22b Don't skip zero dividing tests 2a655a0e Remove get_seg_prefix_ds from read_moffs (preparation for calling read_moffs from the code generator) bc580b71 Remove obsolete comment e556cee0 Fix nasmtest dependencies in makefile and clean dcb1e72b Use all cores on travis 86efa737 Replace all instances of u32 & 0xFFFF with the respective u16 accesses 98b9f439 Use u8 instead of bit-shifts and masks from u32 b43f6569 Replace all instances of u32 >> 16 with the respective u16 accesses 9bfa72c7 Remove unnecessary parens 9cf93734 Clean up remaining instance of u32 with a mask instead of u16 22d4117f Correct order of writes in virt_boundary_write32 6734c7c1 Fix keyboard on ios, fixes #105 858a4506 Add missing file, c_ast.js 1d62e39e Move instruction naming scheme into function f4816852 Reorder some code 69d49788 Minor improvements 0493e05f Add util.js af9000c1 Improve full test e5feba31 Add missing export c7c42065 Replace prefix_call with custom_resolve_modrm 3186e6ad Add support for "%%" format string to dbg_log_wasm for printf import efe54fad Add barebones instrumentation profiler (disabled by default). c9f0d462 Implement movlps m64, xmm and enable its test 42869a12 Add tests for cross-page reads/writes confirmed with byte reads/writes d68976ea Mask word values in port byte reads 9758d51e Add PS2_LOG_VERBOSE 5f52f037 Update NASM Makefile to include all dependencies to prevent unnecessary recompilation 2c71f927 Have NASM test generator use a seedable PRNG to allow for faster incremental tests e4aa45bb Add chunk{16,32}_rw paging tests; instructions that read and write to memory bdf538a2 add codegen to cpu constructor aa76ce8e add resolve_modrm16 14d7ecf1 refactor codegen b710319f [rebased] Merge branch codegen 0565ea42 minor refactoring 071dff3f temporary fix for automatic cast warnings 57c504f2 fix modrm16 issue c2db5d9e jit modrm32 85c04245 reinstate modrm_fn0 and modrm_fn1 be65dafd add ip and previous ip manipulating functions ae00ef89 update codegen js interface 530a74fa squashed commit for refactor 2c692199 add codegen-test to build c15afe68 prefix gen to codegen api c9611533 codegen tests fixes
2020-05-08 23:39:42 +02:00
]);
}
encodings.sort((e1, e2) => {
let o1 = (e1.opcode & 0xFF00) === 0x0F00 ? e1.opcode & 0xFFFF : e1.opcode & 0xFF;
let o2 = (e2.opcode & 0xFF00) === 0x0F00 ? e2.opcode & 0xFFFF : e2.opcode & 0xFF;
return o1 - o2 || e1.fixed_g - e2.fixed_g;
});
Minor: Use freeze on instruction objects
2018-03-21 17:12:42 +01:00
module.exports = Object.freeze(encodings.map(entry => Object.freeze(entry)));
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